Investigation for Multi-bit per Cell on the CSL-NOR Type SONOS Flash Memories |
Kim Joo-Yeon
(울산과학대학 전기전자통신학부 반도체응용전공)
An Ho-Myoung (광운대학교 전자재료공학과) Lee Myung-Shik (광운대학교 전자재료공학과) Kim Byung-Cheul (진주산업대학교 전자공학과) Seo Kwang-Yell (광운대학교 전자재료공학과) |
1 | The International Technology Roadmap for Semiconductor(ITRS), table 38a, 2001 |
2 | B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, 'NROM: a novel localized trapping, 2-bit nonvolatile memory cell', IEEE Electron Device Letters, Vol. 21, No. 11, p. 543, 2000 DOI ScienceOn |
3 | Chun Chen and Tso-Ping Ma, 'Direct lateral profile of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's', IEEE Trans. Electron Dev., Vol. 45, No. 11, p. 512, 1998 |
4 | S. Tiwari et al. 'A silicon nanocrystals based memory', Appl. Phys. Lett. Vol. 68, p, 1377, 1996 DOI |
5 | H. A. R. Wegener, A. J Lincoln, H. C. Pao, M. R. O'Connell, and R. E. Oleksiak, 'The variable threshold transistor, a new electrically alterable, non-destructive read-only storage device', IEEE IEDM Tech. Dig., Washington, D. C., p, 70, 1967 |
6 | F. L. Hampton and J. R. Cricchi, 'Space charge distribution limitation on scale down of MNOS memory devices', IEEE IEDM Tech. Dig., p. 374, 1979 |
7 | Ho-Myoung An, Myung-Shik Lee, KwangYell Seo, Byoung-Cheul Kim, and Joo- Yeon Kim, 'An investigation of locally trapped charge distribution using the charging pumping method in the two-bit SONOS cell', Trans. EEM, Vol. 5, No.4, p. 148, 2004 |
8 | 김주연, 'SONOS구조를 갖는 멀티비트 소자의 프로그램 특성', 전기전자재료학회논문지, 16권 9호, p. 771, 2003 |