1 |
Kim, S. K., Kim, H. J., Lim, S. Y., Kim, S. Y., Yang, I. Y., and An, E. J., 2010, "Dynamic Reliability Assesment of Solder Balls on the Design Parameters of Flip Chips," KSMTE Fall Conference, pp. 149-153.
|
2 |
JEDEC standard, 2003, Board Level Drop Test Method of Components for Handheld Electronic Products, JESD22-B111, JEDEC Solid State Technology Association, Electronic Industries Alliance, USA.
|
3 |
Kim, S. K., Kim, K. L., Bae, J. G., Park, S. H., and Lee, D. G., 2009, "Dynamic Analysis of Flip Chips with Solder Balls with Two Different Compositions," KSPE Fall Conference, pp. 207-208.
|
4 |
Kim, S. K., 2011, "Board-Level Drop Analyses having the Flip Chips with Solder balls of Sn-3.0Ag-0.5Cu and Sn-1.0Ag-0.5Cu," J. of the KSMTE, Vol. 20, No. 2, pp. 193-201.
|
5 |
Cai, C., Zheng, h., Khan M. S., and Hung, K. C., 2002, "Modeling of Material Damping Properties in ANSYS," CADFEM Users' Meeting & ANSYS Conference, pp. 9 -24.
|
6 |
Tee, Y., Luan, J., Ng, H. S., Lim, C. K., Pek, E., and Zhong, Z., 2004, "Advanced Experimental and Simulation Techniques for Analysis of Dynamic Responses during Drop Impact," 54th Electronic Components and Technology Conference, pp. 1088-1094.
|
7 |
Mattila, T. T., Marjamaki, P., and Kivilahti, J. K., 2006, "Reliability of CSP Interconnctions under Mechanical Shock Loading Conditions," IEEE Transaction on Components and Packaging Technologies, Vol. 29, No. 4, pp. 787-795.
|