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Dynamic Reliability of Board Level by Changing the Design Parameters of Flip Chips  

Kim, Seong-Keol (서울과학기술대학교 기계설계자동화공학부)
Lim, Eun-Mo (서울과학기술대학교 기계설계자동차공학부)
Publication Information
Journal of the Korean Society of Manufacturing Technology Engineers / v.20, no.5, 2011 , pp. 559-563 More about this Journal
Abstract
Drop impact reliability assessment of solder joints on the flip chip is one of the critical issues for micro system packaging. Our previous researches have been showing that new solder ball compositions of Sn-3.0Ag-0.5Cu has better mechanical reliability than Sn-1.0Ag-0.5Cu. In this paper, dynamic reliability analysis using Finite Element Analysis (FEA) is carried out to assess the factors affecting flip chip in drop simulation. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.0Ag0.5Cu. The board systems by JEDEC standard including 15 chips, solder balls and PCB are modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder balls. It is found that larger chip size, smaller chip array, smaller ball diameter, larger pitch, and larger chip thickness have bad effect on maximum yield stress and strain at solder ball of each chip.
Keywords
Flip chip; Drop impact reliability; Mechanical reliability; Chip size; Array; Ball size; Pitch; Chip thickness;
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