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| 1 |
An Adaptively Segmented Forward Problem Based Non-Blind Deconvolution Technique for Analyzing SRAM Margin Variation Effects
Somha, Worawit;Yamauchi, Hiroyuki;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.365-375,
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| 2 |
A 45 nm 9-bit 1 GS/s High Precision CMOS Folding A/D Converter with an Odd Number of Folding Blocks
Lee, Seongjoo;Lee, Jangwoo;Song, Minkyu;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.376-382,
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| 3 |
Implementation of Excitatory CMOS Neuron Oscillator for Robot Motion Control Unit
Lu, Jing;Yang, Jing;Kim, Yong-Bin;Ayers, Joseph;Kim, Kyung Ki;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.383-390,
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| 4 |
Algorithmic GPGPU Memory Optimization
Jang, Byunghyun;Choi, Minsu;Kim, Kyung Ki;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.391-406,
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| 5 |
High Throughput Radix-4 SISO Decoding Architecture with Reduced Memory Requirement
Byun, Wooseok;Kim, Hyeji;Kim, Ji-Hoon;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.407-418,
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| 6 |
7.7 Gbps Encoder Design for IEEE 802.11ac QC-LDPC Codes
Jung, Yong-Min;Chung, Chul-Ho;Jung, Yun-Ho;Kim, Jae-Seok;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.419-426,
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| 7 |
Performance and Variation-Immunity Benefits of Segmented-Channel MOSFETs (SegFETs) Using HfO2 or SiO2 Trench Isolation
Nam, Hyohyun;Park, Seulki;Shin, Changhwan;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.427-435,
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| 8 |
A Two-bit Bus-Invert Coding Scheme With a Mid-level State Bus-Line for Low Power VLSI Design
Yoon, Myungchul;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.436-442,
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| 9 |
Design Optimization of Hybrid-Integrated 20-Gb/s Optical Receivers
Jung, Hyun-Yong;Youn, Jin-Sung;Choi, Woo-Young;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.443-450,
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| 10 |
Compact Model of a pH Sensor with Depletion-Mode Silicon-Nanowire Field-Effect Transistor
Yu, Yun Seop;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.451-456,
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| 11 |
A Low-Jitter DLL-Based Clock Generator with Two Negative Feedback Loops
Choi, Young-Shig;Park, Jong-Yoon;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.457-462,
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| 12 |
Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY Interface
Seong, Ki-Hwan;Lim, Ji-Hoon;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.463-470,
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| 13 |
EMI Prediction of Slew-Rate Controlled I/O Buffers by Full-Wave and Circuit Co-Simulation
Kim, Namkyoung;Hwang, Jisoo;Kim, SoYoung;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.471-477,
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| 14 |
Investigation of Buffer Traps in AlGaN/GaN Heterostructure Field-Effect Transistors Using a Simple Test Structure
Jang, Seung Yup;Shin, Jong-Hoon;Hwang, Eu Jin;Choi, Hyo-Seung;Jeong, Hun;Song, Sang-Hun;Kwon, Hyuck-In;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.478-483,
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| 15 |
A PVT-compensated 2.2 to 3.0 GHz Digitally Controlled Oscillator for All-Digital PLL
Kavala, Anil;Bae, Woorham;Kim, Sungwoo;Hong, Gi-Moon;Chi, Hankyu;Kim, Suhwan;Jeong, Deog-Kyoon;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.484-494,
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| 16 |
Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode
Bouangeune, Daoheung;Choi, Sang-Sik;Cho, Deok-Ho;Shim, Kyu-Hwan;Chang, Sung-Yong;Leem, See-Jong;Choi, Chel-Jong;
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The Institute of Electronics and Information Engineers
, v.14, no.4, pp.495-502,
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