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http://dx.doi.org/10.5573/JSTS.2013.13.2.170

Fractional-N Frequency Synthesis: Overview and Practical Aspects with FIR-Embedded Design  

Rhee, Woogeun (Institute of Microelectronics, Tsinghua University)
Xu, Ni (Institute of Microelectronics, Tsinghua University)
Zhou, Bo (Institute of Microelectronics, Tsinghua University, Beijing, China and now with Beijing Institute of Technology)
Wang, Zhihua (Institute of Microelectronics, Tsinghua University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.13, no.2, 2013 , pp. 170-183 More about this Journal
Abstract
This paper gives an overview of fractional-N phase-locked loops (PLLs) with practical design perspectives focusing on a ${\Delta}{\Sigma}$ modulation technique and a finite-impulse response (FIR) filtering method. Spur generation and nonlinearity issues in the ${\Delta}{\Sigma}$ fractional-N PLLs are discussed with simulation and hardware results. High-order ${\Delta}{\Sigma}$ modulation with FIR-embedded filtering is considered for low noise frequency generation. Also, various architectures of finite-modulo fractional-N PLLs are reviewed for alternative low cost design, and the FIR filtering technique is shown to be useful for spur reduction in the finite-modulo fractional-N PLL design.
Keywords
CMOS integrated circuits; PLL; frequency synthesizer; fractional-N; delta-sigma modulator;
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