Browse > Article
http://dx.doi.org/10.5573/JSTS.2010.10.3.225

Investigation of Thermal Noise Factor in Nanoscale MOSFETs  

Jeon, Jong-Wook (Semiconductor Research Center, Samsung Electronics)
Park, Byung-Gook (ISRC and School of Electrical Engineering, Seoul National University)
Shin, Hyung-Cheol (ISRC and School of Electrical Engineering, Seoul National University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.10, no.3, 2010 , pp. 225-231 More about this Journal
Abstract
In this paper, we investigate the channel thermal noise in nanoscale MOSFETs. Simple analytical model of thermal noise factor in nanoscale MOSFETs is presented and it is verified with accurately measured noise data. The noise factor is expressed in terms of the channel conductance and the electric field in the gradual channel region. The proposed noise model can predict the channel thermal noise behavior in all operating bias regions from the long-channel to nanoscale MOSFETs. From the measurement results, we observed that the thermal noise model for the long-channel MOSFETs does not always underestimate the short-channel thermal noise.
Keywords
Channel thermal noise; nanoscale MOSFETs; noise modeling; short channel effects; thermal noise factor;
Citations & Related Records

Times Cited By SCOPUS : 2
연도 인용수 순위
  • Reference
1 A. S. Roy and C. C. Enz, “Compact modeling of Thermal Noise in the MOS Transistor,” IEEE Trans. Electron Devices, Vol.52, No.4, pp.611-614, Apr. 2005.   DOI   ScienceOn
2 C. Enz, “An MOS Transistor Model for RF IC Design Valid in All Regions of Operation,” IEEE Trans. Microwave Theory and Techniques, Vol.50, No.1, pp.342-359, Jan. 2002.   DOI   ScienceOn
3 K. Han, G. Joon, S.-S. Song, J. Han, H. Shin, C.-K. Kim, and K. Lee, “Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier,” IEEE Jour. of Solid-State Circuits, Vol.40, No.3, pp.726-735, Mar. 2005.   DOI   ScienceOn
4 A. van der Ziel, Noise in Solid State Devices and Circuits, New York : Wiley, 1986.
5 W. Jin, P.C.H. Chan, J. Lau, “A physical thermal noise model for SOI MOSFET,” IEEE Trans. Electron Devices, Vol.47, No.4, pp.768-773, Apr. 2000.   DOI   ScienceOn
6 J. Jeon, J. D. Lee, B.-G.. Park, and H. Shin, “An analytical channel thermal noise model for deepsubmicron MOSFETs with short channel effects,” Solid-State Electronics, Vol.51, No.7, pp.1034-1038, July 2007.   DOI   ScienceOn
7 S. Wolf, Silicon Processing for the VLSI Era Volume 3 – The Submicron MOSFET, Lattice Press, 1995.
8 M. J. Deen, C. H. Chen, S. Asgaran, G. A. Rezvani, J. Tao, and Y. Kiyota, “High -Frequency Noise of Modern MOSFETs : Compact Modeling and Measurement Issues,” IEEE Trans. Electron Devices, Vol.53, pp.2062-2081, Sep. 2006.   DOI   ScienceOn
9 J. Kim, J. Lee, I. Song, Y. Yun, J. D. Lee, B.-G. Park, and H. Shin, “Accurate Extraction of Effective Channel Length and Source/Drain Series Resistance in Ultrashort-Channel MOSFETs by Iteration Method,” IEEE Trans. Electron Devices, Vol.55, No.10, pp.2779-2784, Dec. 2008.   DOI   ScienceOn
10 H. Hillbrand and P. Russer, “An Efficient Method for Computer Aided Noise Analysis of Linear Amplifier Network,” IEEE Trans. Circuit Syst., Vol. CAS-23, pp.235-238, Apr. 1976.   DOI
11 D. K. Shaeffer and T. H. Lee, “A 1.5-V 1.5-GHz CMOS low-noise amplifier,” IEEE J. Solid-State Circuits, Vol.23, pp.745-759, May 1997.   DOI   ScienceOn
12 G. Knoblinger, “RF noise of deep-submicron MOSFETs: extraction and modeling,” in Proc. 28th Eur. Solid-State Device Research Conf. (ESSDERC), 1998, pp.460-462.
13 A. J. Scholten, L. F. Tiemeier, R. Van Langevelde, R. J. Havens, A. T. A Zegers-van Duijnhoven, R. de Kort and D. B. M Klassen, “Compact modeling of noise for RF CMOS circuit design,” IEE Proc.-Circuit Device Syst., Vol.151, No.2, pp.167-174, Apr. 2004.   DOI   ScienceOn
14 C. H. Chen and M. J. Deen, “Channel Noise Modeling of Deep Submicron MOSFETs,” IEEE Trans. Electron Devices, Vol.49, No.8, pp.1484-1487, August 2002.   DOI   ScienceOn
15 A. J. Scholten, H. J. Tromp, L. F. Tiemeijer, R. van Langevelde, R. J. Havens, P.W. H. de Vreede, R. F. M. Roes, P. H.Woerlee, A. H. Montree, and D. B. M. Klaassen, “Accurate thermal noise model for deep–submicron CMOS,” IEDM Tech. Dig., Dec. 1999, pp.155-158.
16 Y. P. Tsividis, Operation and Modeling of the MOS Transistor, New York : McGraw-Hill, 1987.
17 K. Han, H. Shin, and K. Lee, “Analytical drain thermal noise current model valid for deep submicron MOSFETs,” IEEE Trans. Electron Devices, Vol.51, No.2, pp.261-269, Feb. 2004.   DOI   ScienceOn
18 J. Jeon, I. Song, I. M. Kang, Y. Yun, B.-G. Park, J. D. Lee, and H. Shin, “A new noise parameter model of short-channel MOSFETs,” in Proc. IEEE Radio Frequency Integrated Circuits(RFIC) Symposium, June 2007, pp.639-642.
19 S. Asgaran, M. J. Deen, and C. H. Chen, “Analytical Modeling of MOSFETs Channel Noise and Noise Parameters,” IEEE Trans. Electron Devices, Vol.51, No.12, pp.2109-2114, Dec. 2004.   DOI   ScienceOn