[KSCI] Korea Science Citation Index Service

http://dx.doi.org/10.5573/JSTS.2008.8.2.134

Power-Gating Structure with Virtual Power-Rail Monitoring Mechanism

Lee, Hyoung-Wook (School of Electrical Engineering, Seoul National University)
Lee, Hyun-Joong (School of Electrical Engineering, Seoul National University)
Woo, Jong-Kwan (School of Electrical Engineering, Seoul National University)
Shin, Woo-Yeol (School of Electrical Engineering, Seoul National University)
Kim, Su-Hwan (School of Electrical Engineering, Seoul National University)

Publication Information

JSTS:Journal of Semiconductor Technology and Science / v.8, no.2, 2008 , pp. 134-138 More about this Journal

Abstract

We present a power gating turn-on mechanism that digitally suppresses ground-bounce noise in ultra-deep submicron technology. Initially, a portion of the sleep transistors are switched on in a pseudo-random manner and then they are all turned on fully when VVDD is above a certain reference voltage. Experimental results from a realistic test circuit designed in 65nm bulk CMOS technology show the potential of our approach.

Keywords

Leakage; sub-threshold; power-gating; ground-bounce noise; deep sub-micron;

Citations & Related Records

Reference

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