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1 Low Power Digital Logic Gate Circuits Based on N-Channel Oxide TFTs
Ren, Tao;Park, Kee-Chan;Oh, Hwan-Sool; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.1-6,
2 A Printing Process for Source/Drain Electrodes of OTFT Array by using Surface Energy Difference of PVP (Poly 4-vinylphenol) Gate Dielectric
Choi, Jae-Cheol;Song, Chung-Kun; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.7-11,
3 Analysis of Electrical/optical Characteristics Using The Octagonal Finger Type Electrode Pattern for Large-scale Lateral GaN LED
Yang, Ji-Won;Kim, Dong-Ho;Kim, Tae-Geun; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.12-17,
4 The Analysis About The Yield Strength Improvement of The Silicon Low-pressure Sensor
Lee, Seung-Hwan;Kim, Hyeon-Cheol; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.18-24,
5 Predicting the Significance of On-Chip Inductance Issues Based on Inductance Screening Results
Kim, So-Young; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.25-33,
6 A Design of Wide-Range Digitally Controlled Oscillator with an Active Inductor
Pu, Young-Gun;Park, An-Soo;Park, Hyung-Gu;Park, Joon-Sung;Lee, Kang-Yoon; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.34-41,
7 Area-Efficient Squarer and Fixed-Width Squarer Design
Cho, Kyung-Ju; / The Institute of Electronics and Information Engineers , v.48, no.3, pp.42-47,