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A New Reseeding Methodology Using a Variable-Length Multiple-Polynomial LFSR  

Yang Myung-Hoon (Department of Electrical and Electronic Engineering, Yonsei University)
Kim Youbean (Department of Electrical and Electronic Engineering, Yonsei University)
Lee Yong (Department of Electrical and Electronic Engineering, Yonsei University)
Park Hyuntae (Department of Electrical and Electronic Engineering, Yonsei University)
Kang Sungho (Department of Electrical and Electronic Engineering, Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.3, 2005 , pp. 35-42 More about this Journal
Abstract
This paper proposes a new reseeding methodology using a variable-rank multiple-polynomial linear feedback shift register (MP-LFSR). In the proposed reseeding scheme, a test cube with large number of specified bits is encoded with a high-rank polynomial, while a test cube with a small number of specified bits is encoded with a low-rank polynomial. Therefore, according to the number of specified bits in each test cube, the size of the encoded data can be optimally reduced. A variable-rank MP-LFSR can be implemented with a slight modification of a conventional MP-LFSR and Multiple Polynomial can be represented by adding just 1 bit to encoding data. The experimental results on the largest ISCAS'89 benchmark circuits show that the proposed methodology can provide much better encoding efficiency than the previous methods with adequate hardware overhead.
Keywords
test; Linear feedback shift register (LFSR) reseeding; encoding efficiency;
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