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A Low-Power Area-Efficient Charge- Recycling Predecoder  

양병도 (한국과학기술원 전자전산학과)
김이섭 (한국과학기술원 전자전산학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.41, no.7, 2004 , pp. 81-88 More about this Journal
Abstract
In this paper, a low power area efficient charge recycling predecoder (AE-CRPD) is proposed. The AE-CRPD is modified from the conventional charge recycling predecoder (CNV-CRPD). The AE-CRPD significantly reduces the area and power of the control circuits for the charge recycling operation. It saves 38% area and 8% power of the 2-to-4 CNV-CRPD. It also utilizes the property of the consecutive address increase in the memory. The AE-CRPDs are used for the frequently transited least significant bits and the conventional predecoders are used for the occasionally transited most significant bits. It saves 23% power of the 12-bit conventional predecoder.
Keywords
VLSI; CMOS; Memory; predecoder; and charge-recycling;
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