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1 |
Accurate Extraction of the Effective Channel Length of MOSFET Using Capacitance Voltage Method
김용구;지희환;한인식;박성형;이희덕;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.1-6,
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2 |
An Improved Extraction Method for Splitting Base-Collector Capacitance in Bipolar Transistor Equivalent Circuit Model
이성현;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.7-12,
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3 |
Tolerance design of position accuracy of optical components for micro optical system
이재영;황병철;박헌용;박세근;이승걸;오범환;이일항;최두선;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.13-20,
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4 |
PMOSFET Hot Carrier Lifetime Dominated by Hot Hole Injection and Enhanced PMOSFET Degradation than NMOSFET in Nano-Scale CMOSFET Technology
나준희;최서윤;김용구;이희덕;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.21-29,
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5 |
On the Validity of the Effective Cavity Model with the Transfer Matrix Method as a Frame of Reference In VCSELs
김태용;김상배;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.31-36,
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6 |
Tailoring the Static Characteristics of Implanted VCSELs with the Implant and Metal Aperture Radii
Kim, Tae-Yong;Kim, Sang-Bae;Park, Bun-Jae;Son, Jeong-Hwan;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.37-41,
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7 |
An Implementation of Efficient Functional Verification Environment for Microprocessor
권오현;이문기;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.43-52,
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8 |
A Efficient Architecture of MBA-based Parallel MAC for High-Speed Digital Signal Processing
서영호;김동욱;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.53-61,
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9 |
Implementation of 1.5Gbps Serial ATA
박상봉;허정화;신영호;홍성혁;박노경;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.63-70,
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10 |
A Low-Power Bus Transmission Scheme for Packet-Type Data
윤명철;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.71-79,
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11 |
A Low-Power Area-Efficient Charge- Recycling Predecoder
양병도;김이섭;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.81-88,
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12 |
High-linearity voltage-controlled current source circuits with wide range current output
차형우;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.89-96,
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13 |
A High Speed Block Turbo Code Decoding Algorithm and Hardware Architecture Design
유경철;신형식;정윤호;김근회;김재석;
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The Institute of Electronics and Information Engineers
, v.41, no.7, pp.97-103,
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