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An Implementation of Efficient Functional Verification Environment for Microprocessor  

권오현 (삼성전자 DM연구소)
이문기 (연세대학교 전기전자공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.41, no.7, 2004 , pp. 43-52 More about this Journal
Abstract
This paper proposes an efficient functional verification environment of microprocessor. This verification environment consists of test vector generator part, simulator part, and comparator part. To enhance efficiency of verification, it use a bias random test vector generator. In a part of simulation, retargetable instruction level simulator is used for reference model. This verification environment is excellent to find error which is not detected by general test vector and will become a good guide to find new error type
Keywords
마이크로프로세서;기능 검증;랜덤 테스트 벡터 생성기;명령어 수준 시뮬레이터;
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Times Cited By KSCI : 1  (Citation Analysis)
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