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A Study on IEEE 1149.1 TAP Test Methodology for Minimum Area Overhead  

김문준 (숭실대학교 컴퓨터학과)
장훈 (숭실대학교 컴퓨터학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.41, no.11, 2004 , pp. 61-68 More about this Journal
Abstract
Today almost all chips have IEEE 1149.1 tap controller inside. Recently the circuit is embedded in the chips for other functional objectives. Hence a CED technique for testing and monitoring the IEEE 1149.1 tap controller had been proposed. This paper studies the optimal CED test technique on the IEEE 1149.1 tap controller. There are duplication, parity prediction, and hybrid techniques. The hybrid technique shows the best result on the area overhead. This means that the hybrid technique is perfectly adequate for the IEEE 1149.1 tap controller to be applied to test with the optimal area overhead and can be used widely in the field. Furthermore, we made more reduction from the previous method resulting in less area overhead.
Keywords
IEEE 1149.1; TAP Controller; Board Level Testing; CED;
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