과제정보
This research was supported by the MSIT(Ministry of Science and ICT), Korea, under the ICAN(ICT Challenge and Advanced Network of HRD) program(IITP-2023-RS-2022-00156385) supervised by the IITP(Institute of Information & Communications Technology Planning & Evaluation). This research was supported by the MSIT(Ministry of Science and ICT), Korea, under the Innovative Human Resource Development for Local Intellectualization support program(IITP-2023-RS-2022-00156287) supervised by the IITP(Institute for Information & communications Technology Planning & Evaluation). This research was supported by the BK21 FOUR Program(Fostering Outstanding Universities for Research, 5199991714138) funded by the Ministry of Education(MOE, Korea) and National Research Foundation of Korea(NRF). The EDA tool was supported by the IC Design Education Center (IDEC), South Korea.
참고문헌
- M. J. M. Pelgrom, A. C. J. Duinmaijer and A. P. G. Welbers, "Matching properties of MOS transistors," in IEEE Journal of Solid-State Circuits, vol.24, no.5, pp.1433-1439, 1989. DOI: 10.1109/JSSC.1989.572629
- M. J. Lee, K. M. Kyung, H. S. Won, M. S. Lee and K. W. Park, "A bitline sense amplifier for offset compensation," 2010 IEEE International Solid-State Circuits Conference - (ISSCC), San Francisco, CA, USA, pp.438-439, 2010. DOI: 10.1109/ISSCC.2010.5433892
- M. J. Lee, "A Sensing Noise Compensation Bit Line Sense Amplifier for Low Voltage Applications," in IEEE Journal of Solid-State Circuits, vol.46, no.3, pp.690-694, 2011. DOI: 10.1109/JSSC.2010.2102570
- S. M. Kim, B. Song, S. O. Jung, "Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.27, no.10, pp.2413-2422, 2019. DOI: 10.1109/TVLSI.2019.2920630
- D. Y. Kim et al., "Offset Reduction Scheme of the Voltage Latched Sense Amplifier," Journal of The Institute of Electronics and Information Engineers, vol.59, no.6, pp.32-35, 2022. DOI: 10.5573/ieie.2022.59.6.32
- T. Zhang, C. Xu, Y. Xie, and G. Sun, "Lazy precharge: An overhead-free method to reduce precharge overhead for memory parallelism improvement of DRAM system," in Proc. IEEE 31st Int. Conf. Comput. Design (ICCD), pp.138-144, 2013. DOI: 10.1109/ICCD.2013.6657036