한국전자통신학회논문지 (The Journal of the Korea institute of electronic communication sciences)

한국전자통신학회 (Korea Institute of Electronic Communication Science)
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Implementation of a High Performance XOR-XNOR Circuit

  • Kim, Jeong-Beom (Dept. of Electronics Engineering, Kangwon National University)
  • 투고 : 2022.02.16
  • 심사 : 2022.04.17
  • 발행 : 2022.04.30
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초록

The parity function can be implemented with XOR (exclusive-OR) and XNOR (exclusive NOR) circuit. In this paper we propose a high performance XOR-XNOR circuit. The proposed circuitreduced the internal load capacitance on critical path and implemented with 8 transistors. The circuit produces a perfect output signals for all input combinations. Compared with the previous circuits, the proposed circuit presents the improved characteristics in average propagation delay time, power dissipation, power-delay product (PDP), and energy-delay-product (EDP). The proposed circuits are implemented with standard CMOS 0.18um technology. Computer simulations using SPICE show that the proposed circuit realizes the expected logic functions and achieves a reasonable performance.

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참고문헌

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