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http://dx.doi.org/10.13067/JKIECS.2022.17.2.351

Implementation of a High Performance XOR-XNOR Circuit  

Kim, Jeong-Beom (Dept. of Electronics Engineering, Kangwon National University)
Publication Information
The Journal of the Korea institute of electronic communication sciences / v.17, no.2, 2022 , pp. 351-356 More about this Journal
Abstract
The parity function can be implemented with XOR (exclusive-OR) and XNOR (exclusive NOR) circuit. In this paper we propose a high performance XOR-XNOR circuit. The proposed circuitreduced the internal load capacitance on critical path and implemented with 8 transistors. The circuit produces a perfect output signals for all input combinations. Compared with the previous circuits, the proposed circuit presents the improved characteristics in average propagation delay time, power dissipation, power-delay product (PDP), and energy-delay-product (EDP). The proposed circuits are implemented with standard CMOS 0.18um technology. Computer simulations using SPICE show that the proposed circuit realizes the expected logic functions and achieves a reasonable performance.
Keywords
Parity Function; XOR-XNOR; High-Performance Circuit; Low-Power Circuit; Energy-Efficient Circuit; PDP; EDP;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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