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Large Area Wafer-Level High-Power Electronic Package Using Temporary Bonding and Debonding with Double-Sided Thermal Release Tape

양면 열박리 테이프 기반 임시 접합 공정을 이용한 대면적 웨이퍼 레벨 고출력 전자패키지

  • Hwang, Yong-Sik (Department of Electronic Engineering, Chungnam National Unversity) ;
  • Kang, Il-Suk (National Nanofab Center) ;
  • Lee, Ga-Won (Department of Electronic Engineering, Chungnam National Unversity)
  • Received : 2021.12.03
  • Accepted : 2021.12.23
  • Published : 2022.01.31

Abstract

High-power devices, such as LEDs and radars, inevitably generate a large amount of heat, which is the main cause of shortening lifespan, deterioration in performance, and failure of electronic devices. The embedded IC process can be a solution; however, when applied to large-area substrates (larger than 8 in), there is a limit owing to the difficulty in the process after wafer thinning. In this study, an 8-in wafer-level high-power electronic package based on the embedded IC process was implemented with temporary bonding and debonding technology using double-sided thermal release tape. Good heat-dissipation characteristics were demonstrated both theoretically and experimentally. These findings will advance the commercialization of high-power electronic packaging.

Keywords

Acknowledgement

Embedded IC process를 이용하여 8인치 기판을 공급해 주신 (주)웨이비스사(社)에 감사를 드립니다. 이 논문은 한국산업기술평가관리원의 디스플레이혁신 공정플랫폼구축사업(20006476)의 지원으로 수행되었습니다.

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