The Journal of the Korea institute of electronic communication sciences (한국전자통신학회논문지)

Korea Institute of Electronic Communication Science (한국전자통신학회)
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STI Top Profile Improvement and Gap-Fill HLD Thickness Evaluation

STI의 Top Profile 개선 및 Gap-Fill HLD 두께 평가

  • 강성준 (전남대학교 전기 및 반도체공학과) ;
  • 정양희 (전남대학교 전기 및 반도체공학과)
  • Received : 2022.09.21
  • Accepted : 2022.12.17
  • Published : 2022.12.31
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Abstract

STI has been studied a lot as a process technology for wide area planarization according to miniaturization and high integration of semiconductor devices. In this study, as methods for improving the STI profile, wet etching of pad oxide using hydrofluorine solution and dry etching of O2+CF4 after STI dry etching were proposed. This process technology showed improvement in profile imbalance and leakage current between patterns according to device density compared to the conventional method. In addition, as a result of measuring the HLD thickness after CMP for a device having the same STI depth and HLD deposition, the measured value was different depending on the device density. It was confirmed that this was due to the difference in the thickness of the nitride film according to the device density after CMP and the selectivity of the slurry.

STI는 반도체 소자의 소형화 및 고집적화에 따른 광역 평탄화를 위한 공정 기술로써 많은 연구가 이루어져 왔다. 본 연구에서는 STI의 profile 개선을 위한 방법으로 STI 건식각 후 HF 용액에 의한 pad oxide 습식각과 O2+CF4 건식각을 제안하였다. 이 공정 기술은 기존의 방법보다 소자의 밀집도에 따른 패턴간의 프로파일 불균형과 누설전류의 개선을 나타내었다. 또한 동일한 STI 깊이와 HLD 증착를 갖는 디바이스에 대하여 CMP 후 HLD 두께를 측정한 결과 디바이스 밀도에 따라 측정값이 다르게 나타났고 이는 CMP 후 디바이스 밀도에 따른 질화막의 두께 차이 및 슬러리의 선택비에 기인됨을 확인하였다.

Keywords

References

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