Acknowledgement
This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea government (MSIT) (No. 2020R1G1A1009777)
References
- MJM. Pelgrom, et al., "Matching properties of MOS transistors," IEEE Journal of solid-state circuits, Vol.24, No.5: pp.1433-1439, 1989. DOI: 10.1109/JSSC.1989.572629
- B. Mohammad, et al. "Comparative study of current mode and voltage mode sense amplifier used for 28nm SRAM.," 2012 24th International Conference on Microelectronics (ICM). IEEE, pp.1-6, 2012. DOI: 10.1109/ICM.2012.6471396
- H. Jeong et al. "Bitline precharging and preamplifying switching pMOS for high-speed low-power SRAM," IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.63, No.11, pp.1059-1063, 2016. DOI: 10.1109/TCSII.2016.2548100
- L. T. Clark, et al., "ASAP7: A 7-nm FinFET Predictive Process Design Kit," Microelectronics Journal, vol.53, pp.105-115, 2016. DOI: 10.1016/j.mejo.2016.04.006
- T. S. Doorn, et al. "Importance sampling Monte Carlo simulations for accurate estimation of SRAM yield," ESSCIRC 2008-34th European Solid-State Circuits Conference. IEEE, pp.230-233, 2008. DOI: 10.1109/ESSCIRC.2008.4681834