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Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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A Low-Loss On-Chip Transformer Using an Auxiliary Primary Part (APP) for CMOS Power Amplifier Applications

  • Im, Haemin (School of Electronic Engineering, Soongsil University) ;
  • Park, Changkun (School of Electronic Engineering, Soongsil University)
  • Received : 2019.06.02
  • Accepted : 2019.06.13
  • Published : 2019.06.30
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Abstract

We propose a low-loss on-chip transformer using an auxiliary primary part (APP) for an output matching network for fully integrated CMOS power amplifiers. The APP is designed using a fifth metal layer while the primary and secondary parts are designed using a sixth metal layer with a width smaller than that of the primary and secondary parts of the transformer to minimize the substrate loss and the parasitic capacitance between the primary and secondary parts. By adapting the APP in the on-chip transformer, we obtain an improved maximum available gain value without the need for any additional chip area. The feasibility of the proposed APP structure is successfully verified.

Keywords

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Fig. 1. Simple block diagram of a typical CMOS power amplifier using transformers as an output balun.

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Fig. 2. Typical structure of an on-chip transformer.

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Fig. 3. Proposed on-chip transformer using the auxiliary primary part.

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Fig. 4. Maximum available gains of the typical and proposed transformers according to the operating frequency (length of primary and secondary part: 1.0 mm).

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Fig. 5. Maximum available gains of the typical and proposed transformers according to WA (length of the primary and secondary part: 1.0 mm).

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