The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits

능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구

  • Received : 2018.09.30
  • Accepted : 2018.11.29
  • Published : 2019.06.20
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Abstract

Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

Keywords

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Fig. 1. Traditional passive power decoupling circuit.

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Fig. 2. Representation of α angle.

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Fig. 3. Buck-type active power decoupling circuit.

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Fig. 4. Capacitor-split-type active power decoupling circuit.

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Fig. 7. Buck-type APD simulation results.

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Fig. 8. Capacitor-split-type APD simulation results.

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Fig. 9. HILS experimental setup.

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Fig. 11. Passive power decoupling experimental results.

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Fig. 12. Buck-type APD experimental results.

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Fig. 5. DC-Link voltage according to decoupling method (Simulation results).

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Fig. 6. Passive power decoupling simulation results.

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Fig. 10. DC-Link voltage according to decoupling method (Experimental results).

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Fig. 13. Capacitor-split-type APD experimental results.

TABLE I PARAMETERS OF CAPACITOR MODEL

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TABLE II PARAMETERS OF RIPPLE POWER DECOUPLING

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TABLE III TOTAL VOLUME OF CAPACITOR ACCORDING TO DECOUPLING METHOD

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