Fig. 1. Circuit diagram of Three-level ANPC inverter.
Fig. 2. Current flow path under single device open fault.
Fig. 3. Current flow path under single device short fault.
Fig. 4. Voltage phasor relationships under fault tolerant control.
Fig. 5. Space vector diagram under Sa1 open-circuit fault.
Fig. 6. Reference voltage modulation in case of Sa1 open-circuit fault.
Fig. 7. Waveforms under Sa1 open fault.
Fig. 8. Waveforms under Sa2 open fault.
Fig. 9. Waveforms under Sa5 open fault.
Fig. 10. Vector diagram of maximum modulation index of phase voltage in fault condition.
Fig. 11. HIL experiment using RT-BOX.
Fig. 12. Output current under Sa1 open fault.
Fig. 13. DC link capacitor voltage and motor speed ripple in different mode of operation.
Fig. 14. DC link capacitor voltage and motor speed ripple before and after the application of the proposed neutral voltage balance control.
TABLE I SWITCHING STATES OF THREE-LEVEL ANPC INVERTER
TABLE II SWITCHING SEQUENCE FOR SINGLE DEVICE OPEN CIRCUIT FAULT
TABLE III MAIN EXPERIMENT PARAMETERS
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