마이크로전자및패키징학회지 (Journal of the Microelectronics and Packaging Society)

  • 제26권4호
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  • Pages.101-105
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  • 2019
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  • 1226-9360(pISSN)
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  • 2287-7525(eISSN)
한국마이크로전자및패키징학회 (The Korean Microelectronics and Packaging Society)
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휨을 고려한 칩 패키지의 EMC/PCB 계면 접합 에너지 측정

Measurement of EMC/PCB Interfacial Adhesion Energy of Chip Package Considering Warpage

  • Kim, Hyeong Jun (Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Ahn, Kwang Ho (Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Oh, Seung Jin (Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Kim, Do Han (R&D Group, SIMMTECH Co.) ;
  • Kim, Jae Sung (R&D Group, SIMMTECH Co.) ;
  • Kim, Eun Sook (R&D Group, SIMMTECH Co.) ;
  • Kim, Taek-Soo (Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST))
  • 투고 : 2019.12.06
  • 심사 : 2019.12.27
  • 발행 : 2019.12.30
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⟨ 이전 논문 다음 논문 ⟩

초록

칩 패키지에는 생산 공정 및 운송, 보관 과정에서 발생하는 외부 환경 변화로부터 인쇄 회로 기판(printed circuit board, PCB)을 보호하기 위해 에폭시 몰딩(epoxy molding compound, EMC)이 사용된다. PCB와 EMC의 접합 신뢰성은 제품의 품질 및 수명에 중요한 요소이며 이를 보증하기 위해 제품 설계 및 생산 단계에서 그 접합 에너지를 정밀하게 측정하고, 이에 영향을 끼치는 요소를 통제하여 공정을 최적화 시켜야 한다. 본 논문은 이중 외팔보(double cantilever beam, DCB) 시험을 이용하여 휨(warpage)이 있는 칩 패키지의 EMC와 PCB의 계면 접합 에너지를 측정하고 보정하는 방법에 대해 소개한다. DCB 시험법은 이종 재료의 계면 접합 에너지를 측정하는 전통적인 방법이며 정밀한 접합 에너지 측정을 위해 평평한 기판이 필수적이다. 그러나 칩 패키지는 내부 구성 요소들의 열팽창 계수 차이로 인해 휨이 발생하기 때문에 평평한 기판을 제작하여 정밀한 접합 에너지를 측정하는데 어려움이 있다. 이를 극복하고자 본 연구에서는 휨이 있는 칩 패키지로 DCB 시험법을 위한 시편을 제작하고, 기판의 복원력을 보정하여 접합 에너지를 계산하였다. 보정된 접합에너지는 동일 조건에서 제작된 칩 패키지 중 휨이 없는 시편을 선별하여 측정한 접합 에너지와 비교, 검증하였다.

The adhesion reliability of the epoxy molding compound (EMC) and the printed circuit board (PCB) interface is critical to the quality and lifetime of the chip package since the EMC protects PCB from the external environment during the manufacturing, storage, and shipping processes. It is necessary to measure adhesion energy accurately to ensure product reliability by optimizing the manufacturing process during the development phase. This research deals with the measurement of EMC/PCB interfacial adhesion energy of chip package that has warpage induced by the coefficient of thermal expansion (CTE) mismatch. The double cantilever beam (DCB) test was conducted to measure adhesion energy, and the spring back force of specimens with warpage was compensated to calculate adhesion energy since the DCB test requires flat substrates. The result was verified by comparing the adhesion energy of flat chip packages come from the same manufacturing process.

키워드

참고문헌

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