DOI QR코드

DOI QR Code

A Fault Diagnosis Method in Cascaded H-bridge Multilevel Inverter Using Output Current Analysis

  • Lee, June-Hee (Dept. of Electrical and Electronic Engineering, Ajou University) ;
  • Lee, June-Seok (Railroad Safety Research Division, Korea Railroad Research Institute) ;
  • Lee, Kyo-Beum (Dept. of Electrical and Electronic Engineering, Ajou University)
  • 투고 : 2016.12.28
  • 심사 : 2017.09.14
  • 발행 : 2017.11.01

초록

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

키워드

참고문헌

  1. J. Rodriguez, J-S. Lai, and F. Z. Peng, "Multilevel inverters: a survey of topologies, controls, and applications," IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724-738, Aug. 2002. https://doi.org/10.1109/TIE.2002.801052
  2. M. A. Sayed, M. Ahmed, M. G. Elsheikh, and M. Orabi, "PWM control techniques for single-phase multilevel inverter based controlled DC cells," J. Power Electron., vol. 16, no. 2, pp. 498-511, Mar. 2014. https://doi.org/10.6113/JPE.2016.16.2.498
  3. U.-M. Choi, H.-G. Jeong, K.-B. Lee, and F. Blaabjerg, "Method for detecting an open-switch fault in a grid-connected NPC inverter system," IEEE Trans. Power Electron., vol. 27, no. 6, pp. 2726-2739, June 2012. https://doi.org/10.1109/TPEL.2011.2178435
  4. S. Kouro et al., "Recent advances and industrial application of multilevel converters," IEEE Trans. Ind. Electron., vol. 57, no. 58, pp. 2553-2580, Aug. 2010. https://doi.org/10.1109/TIE.2010.2049719
  5. M. Malinowski, K. Gopakumar, J. Rodriguez, and M. Perez, "A survey on cascaded multilevel inverters," IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2197-2206, Jul. 2010. https://doi.org/10.1109/TIE.2009.2030767
  6. S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, W. Bin, J. Rodriguez, M. A. Perez, and J. I. Leon, "Recent advances and industrial applications of multilevel converters," IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553-2580, Aug. 2010. https://doi.org/10.1109/TIE.2010.2049719
  7. M. Marchesoni and P. Tenca, "Diode-clamped multilevel converters: A practicable way to balance DC link voltages," IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 752-765, Aug. 2002. https://doi.org/10.1109/TIE.2002.801237
  8. S. S. Fazel, S. Bernet, D. Krug, and K. Jalili, "Design and comparison of 4-kv neutral-point-clamped, flyingcapacitor, and series-connected h-bridge multilevel converters," IEEE Trans. Ind. Appl., vol. 43, no. 4, pp. 1032-1040, Jul. 2007. https://doi.org/10.1109/TIA.2007.900476
  9. K. Mylsamy, R. Vairamani, G. C. R. Irudayaraj, and H. T. R. Lawrence, "Experimental validation of a cascaded single phase H-bridge inverter with a simplified switching algorithm," J. Power Electron., vol. 14, no. 3, pp. 507-518, May 2014. https://doi.org/10.6113/JPE.2014.14.3.507
  10. H.-W. Sim, J.-S. Lee, and K.-B. Lee, "Detecting open-wwitch faults: Using asymmetric Zero-voltage switching states," IEEE Ind. Appl. Mag., vol. 22, no. 2, pp. 27-37, Mar-Apr. 2016. https://doi.org/10.1109/MIAS.2015.2459096
  11. B. K. Kwon, S. K. Jung, and T. H. Kim, "Enhancement of cell voltage balancing control by zero sequence current injection in a cascaded H-bridge STATCOM," The Transactions of the Korean Institute of Power Electronics, vol. 20, no. 4, pp. 321-329, Aug. 2015. https://doi.org/10.6113/TKPE.2015.20.4.321
  12. V. Singh, S. Pattnaik, S. Gupta, and B. Santosh, "A single-phase cell-based asymmetrical cascaded multilevel inverter," J. Power Electron., vol. 16, no. 2, pp. 532-541, Mar. 2016. https://doi.org/10.6113/JPE.2016.16.2.532
  13. J. Chavarria, D. Biel, F. Guinjoan, C. Meza, and J. Negroni, "Energybalance control of PV cascaded multilevel grid-connected inverters under level-shifted and phase-shifted PWMs," IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 98-111, Jan. 2013. https://doi.org/10.1109/TIE.2012.2186108
  14. J.-S. Lee and K.-B. Lee, "An open-switch fault detection method and tolerance controls based on SVM in a grid-connected T-type rectifier with unity power factor," IEEE Trans. Ind. Electron., vol. 61, no. 12, pp. 7092-7104, Dec. 2014. https://doi.org/10.1109/TIE.2014.2316228
  15. I. G. Kim and S. S. Kwak, "An algorithm for even distribution of loss, switching frequency, power of model predictive control based cascaded H-bridge multilevel converter," The Transactions of the Korean Institute of Power Electronics, vol. 20, no. 5, pp. 448- 455, Oct. 2015. https://doi.org/10.6113/TKPE.2015.20.5.448
  16. P. Lezana, J. Pou, T. A. Meynard, J. Rodriguez, S. Ceballos, and F. Richardeau, "Survey on fault operation on multilevel inverters," IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2207-2218, Jul. 2010. https://doi.org/10.1109/TIE.2009.2032194
  17. B. Mirafzal, "Survey of fault-tolerance techniques for three-phase voltage source inverters," IEEE Trans. Ind. Electron., vol. 61, no. 10, pp. 5192-5202, Oct. 2014. https://doi.org/10.1109/TIE.2014.2301712
  18. X. Huang, G. Wang, Y. Li, A. Q. Huang, and B. Baliga, "Short-circuit capability of 1200V SiC MOSFET and JFET for fault protection," in Proc. 28th Annu. IEEE Appl. Power Electron. Conf. Expo., Mar. 2013, pp. 197-200.
  19. K. Ambusaidi, V. Pickert, and B. Zahawi, "New circuit topology for fault tolerant H-bridge dc-dc converter," IEEE Trans. Power Electron., vol. 25, no. 6, pp. 1509-1516, Jun. 2010. https://doi.org/10.1109/TPEL.2009.2038217
  20. U.-M. Choi, K.-B. Lee, and F. Blaabjerg, "Diagnosis and tolerant strategy of an open-switch fault for ttype three-level inverter systems," IEEE Trans. Ind. Appl., vol. 50, no. 1, pp. 495-508, Jan./Feb. 2014. https://doi.org/10.1109/TIA.2013.2269531
  21. M. Ma, L. Hu, A. Chen, and X. He, "Reconfiguration of carrier-based modulation strategy for fault tolerant multilevel inverters," IEEE Trans. Power Electron., vol. 22, no. 5, pp. 2050-2060, Sep. 2007. https://doi.org/10.1109/TPEL.2007.904249
  22. S. Ouni, J. Rodriguez, M. Shahbazi, M. Zolghadri, H. Oraee, P. Lezana, and A. U. Schmeisser, "A fast simple method to detect short circuit fault in cascaded H-bridge multilevel inverter," in Proc. IEEE ICIT, pp. 866-871, Mar. 2015.
  23. W. Song and A. Huang, "Fault-tolerant design and control strategy for cascaded h-bridge multilevel converter-based STATCOM," IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2700-2708, Aug. 2010. https://doi.org/10.1109/TIE.2009.2036019
  24. J.-S. Lee and K.-B. Lee, "Tolerance control for inner open-switch faults of a T-type three-level rectifier," J. Power Electron., vol. 14, no. 6, pp. 1157-1165, Nov. 2014. https://doi.org/10.6113/JPE.2014.14.6.1157
  25. V. Gomathy and S. Selvaperumal, "Fault detection and classification with optimization techniques for a three-phase single-inverter circuit," J. Power Electron., vol. 16, no. 3, pp. 1097-1109, Jun. 2016. https://doi.org/10.6113/JPE.2016.16.3.1097
  26. N. Q. T. Vo, H.-C. Choi, and C.-H. Lee, "Shortcircuit protection for the series-connected switches in high voltage applications," J. Power Electron., vol. 16, no. 4, pp. 1298-1305, Jul. 2016. https://doi.org/10.6113/JPE.2016.16.4.1298