Acknowledgement
Supported by : 한국연구재단
References
- P. Dlugosch, D. Brown, P. Glendenning, M. Leventhal, and H. Noyes, "An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing," IEEE Trans. Parallel & Distributed Systems, Vol. 25, No. 12, pp. 3088-3098, Dec. 2014. https://doi.org/10.1109/TPDS.2014.8
- M. Paolieri, I. Bonesana, M. Santambrogio, "ReCPU: a parallel and pipelined architecture for regular expression matching," Proc. IFIP Int. Conf. VLSISoC, 2007.
- I. Bonesana, M. Paolieri, and M. Santambrogio, "An adaptable FPGA-based system for regular expression matching," Proc. conf. Design, Automation and Test in Europe, (DATE'08), 2008.
- Q. Li, J. Li, J. Wang, B. Zhao, and Y. Qu, "A pipelined processor architecture for regular expression string matching," Microprocessors and Microsystems, Vol. 36, No. 6, pp. 520-526, Aug. 2012. https://doi.org/10.1016/j.micpro.2012.04.004
- B. Ahn, K.H Lee, and S.K. Yun, "Regular expression matching processor supporting efficient repetitions," Journal of KIISE : Computing Practices and Letters, Vol. 19, No. 11, pp. 553-558, Nov. 2013. (in Korean)
- DE1-SoC Board, [Online]. Available: http://de1-soc.terasic.com
- Altera, "Cyclone V Hard Processor System Technical Reference Manual," [Online]. Available: https://www.altera.com/en_US/pdfs/literature /hb/cyclone-v/cv_5v4.pdf
- Altera, "Avalon Interface Specifications," [Online]. Available: https://www.altera.com/content/dam/alterawww/global/en_US/pdfs/literature/manual/mnl_avalon_spec.pdf