Topologies of Active-Switched Quasi-Z-source Inverters with High-Boost Capability

Abstract

This paper proposes both an active-switched quasi-Z-source inverter (AS-qZSI) and an extended active-switched qZSI (EAS-qZSI), which are based on the classic qZSI. The proposed AS-qZSI adds only one active switch and one diode to the classic qZSI for increasing the voltage boost capability. Compared with other topologies based on the switched-inductor/capacitor qZSI, the proposed AS-qZSI requires fewer passive components in the impedance network under the same boost capability. Additionally, the proposed EAS-qZSI is designed by adding one inductor and three diodes to the AS-qZSI, which offers enhanced boost capability and lower voltage stress across the switches. The performances of the two proposed topologies are verified by simulation and experimental results obtained from a prototype with a 32-bit DSP built in a laboratory.

I. INTRODUCTION

A conventional voltage source inverter can achieve voltage step-down operations because its peak ac output voltage is lower than the dc input voltage. Therefore, an extra dc boost converter is connected between the dc input voltage and the inverter to increase the dc-link voltage across the inverter bridge. To overcome the constraints of a conventional inverter, a quasi-Z-source inverter (qZSI) was presented in [1]. The qZSI can boost the dc-link voltage by controlling the shoot-through state of the inverter leg and can draw continuous input current without an additional capacitor for filtering. The qZSI is suited to renewable power generations and fuel-cell vehicles due to its voltage boost capability with a single-power stage [2]-[5]. However, the usable boost factor of the qZSI is generally limited due to a narrow shoot-through state range. This condition brings difficulties to further qZSI applications, which require a power converter with a high voltage gain.

Recently, several dc-dc conversion schemes based on the quasi-Z-source impedance network have been introduced in order to enhance the boosting capability. In [6]-[10], the switched-inductor (SL) / switched-capacitor (SC) structures are developed by adding extra inductors / capacitors and diodes in the quasi-Z-source impedance network, and a hybrid SL/SC topology is proposed. To further improve the boost capability, additional cells are serially connected at the qZSI [11], [12]. However, more inductors and/or capacitors at the impedance network are needed to further boost the voltage, and this condition will increase the volume and cost of the power converter. The ZSI-based topology is presented for reducing capacitor voltage stress and suppressing a high start-up current [13]. The topology to add one switching device and one diode to a classic qZSI is proposed in [14]. The number of passive components in the impedance network can be reduced. However, the boost factor may not be enough for renewable power generation.

In this paper, two types of topologies, namely, an active-switched qZSI (AS-qZSI) and an extended active-switched qZSI (EAS-qZSI) are proposed. The proposed topologies offer high boost capability and low voltage stress across the switches. The operating principles and a comparison with other topologies based on the switched inductor/capacitor qZSI declare the performances of the proposed topologies. Such performances are verified by the simulation and experimental results.

 

II. REVIEW OF CLASSIC QZSI AND MODIFIED TOPOLOGIES

Both the classic qZSI and modified topologies based on the classic qZSI structure are shown in Fig. 1. Fig. 1(a) shows the classic qZSI, which has a continuous input current and a lower capacitor voltage stress [1]. The boost factor, defined as the ratio of the peak dc-link voltage across the inverter leg to the dc input voltage Vin, is given by

where Tsh is the shoot-through time during a switching period Ts, and D = Tsh/Ts is the shoot-through duty ratio.

Fig. 1.Classic qZSI and modified topologies. (a) Classic qZSI. (b) Switched-inductor qZSI (SL-qZSI). (c) Continuous- current diode-assisted extended boost qZSI (DA-qZSI).

Fig. 1(b) shows a modified topology based on a qZSI structure called a switched-inductor quasi-ZSI (SL-qZSI). This topology was proposed in [8]. In a SL-qZSI, the three diodes and one inductor are added to the impedance network of the classic qZSI. The SL-qZSI has a SL structure for raising the boost factor and reducing the in-rush current, and its boost factor is given by

Fig. 1(c) shows a continuous-current diode-assisted extended-boost qZSI (DA-qZSI). This topology was proposed in [6]. It can be extended to have a higher boost ability by connecting more cells in serial. The boost factor of the DA-qZSI is given by

 

III. OPERATION PRINCIPLES OF THE PROPOSED TOPOLOGIES

The operation principles for the two types of proposed topologies, AS-qZSI and EAS-qZSI, will be described, respectively.

A. Operation of the AS-qZSI

Fig. 2 shows the proposed AS-qZSI, where one active switch (S7) and one diode (D0) are inserted in the impedance network of the classic qZSI. The proposed AS-qZSI has an extra shoot-through state in addition to the non-shoot-through state, which are the same operating states of the classic qZSI. Therefore, similar to the classic qZSI, the AS-qZSI has two operating states. Fig. 3 shows equivalent circuits of the AS-qZSI in the shoot-through state and the non-shoot-through state.

Fig. 2.Schematic circuit of the proposed AS-qZSI.

Fig. 3.Equivalent circuits of the proposed AS-qZSI. (a) Shoot-through state. (b) Non-shoot-through state.

Shoot-through state: In the shoot-through state for an interval of DTs, the dc-link across the inverter leg is shorted by turning on the upper and lower switches for any of the phase legs, and the switching device S7 is switched on. The diodes Do and D1 are off. The energies stored at two capacitors C1 and C2 are supplied to the two inductors L1 and L2 during this state. From Fig. 3(a), the two inductor voltages vL1 and vL2, and the dc-link voltage vpn can be written as follows, respectively:

Non-shoot-through state: In the non-shoot-through state for an interval of (1-D)Ts, the circuit operates like a conventional inverter, and the switching device S7 is switched off. The diodes Do and D1 are in the conduction state. The energy stored at the two inductors is delivered to the two capacitors and the dc-link side. Thus, the two inductors are discharged and the two capacitors are charged during this state. From Fig. 3(b), the two inductor voltages vL1 and vL2, and the dc-link voltage vpn can be written as follows, respectively:

Applying the volt-second balance principle to each inductor L1 and L2 from (4), (5), (7), and (8), the two capacitor voltages Vc1 and Vc2 can be obtained as a function of D as follows, respectively:

Considering that the peak dc-link voltage is identical with the capacitor voltage Vc1, the boost factor of the AS-qZSI can be expressed as

B. Operation of the EAS-qZSI

Fig. 4 shows the proposed EAS-qZSI, in which one inductor (L3) and three diodes (D2, D3, D4) are added to the AS-qZSI to further enhance the boost capability. Similar with the AS-qZSI, the EAS-qZSI has two operation modes: the shoot-through state and the non-shoot-through state. Fig. 5 shows equivalent circuits of the EAS-qZSI in the shoot-through state and non-shoot-through state.

Fig. 4.Schematic circuit of the proposed EAS-qZSI.

Fig. 5.Equivalent circuits of the proposed EAS-qZSI. (a) Shoot-through state. (b) Non-shoot-through state.

1) Shoot-Through State: In the shoot-through state for an interval of DTs, the dc-link across the inverter leg is shorted by turning on the upper and lower switches for any of the phase legs, and the switching device S7 is switched on, just like the AS-qZSI. The diodes D2 and D3 are in the conduction state, whereas diodes Do, D1, and D4 are in the blocking state. The two inductors L2 and L3 are connected in parallel, and they store energy from capacitor C1. The inductor L1 stores the energy from both capacitor C2 and the dc input voltage Vin. Therefore, the two capacitors C1 and C2 are discharged, and the three inductors L1, L2, and L3 are charged during this state. From Fig. 5(a), the three inductor voltages vL1, vL2, and vL3, the dc-link voltage vpn, and the capacitor current ic1 can be written as follows, respectively:

2) Non-Shoot-Through State: In the non-shoot-through state for an interval of (1-D)Ts, the circuit operates just like a conventional voltage source inverter, and the switching device S7 is switched off. The diodes Do, D1, and D4 are in the conduction state, whereas the diodes D2 and D3 are in the blocking state. The two inductors L2 and L3 are serially connected, and the energy stored at the three inductors is supplied to the two capacitors and the dc-link side. Thus, the three inductors are discharged and the two capacitors are charged. From Fig. 5(b), the three inductor voltages, the dc-link voltage, and the capacitor current can be written as follows, respectively:

Assuming that L2 = L3, it follows that vL2 = vL3 and iL2 = iL3. Applying the volt-second balance principle to each inductor L1 and L2 from (13), (14), (17), and (18), the two capacitor voltages Vc1 and Vc2 can be obtained as a function of D through the following equations respectively.

Similarly, applying the ampere-second balance principle to capacitor C1 from (16) and (20), the average of the two inductor currents can be obtained as

Considering that the peak dc-link voltage is identical to the capacitor voltage Vc1, the boost factor of the EAS-qZSI can be expressed as

The peak phase voltage of inverter is expressed as

where M is the modulation index.

From (26), the ac voltage gain G can be expressed as

3) Effects of the Capacitor Voltage Due to Current Ripples: The effects of capacitor voltage Vc1 for capacitor current variations are analyzed. Fig. 6 shows an equivalent circuit of capacitor C1 considering the equivalent series resistance (ESR), and the capacitor voltage ripple generated by the capacitor current variations during half of a switching period [17].

Fig. 6.Effects of capacitor voltage. (a) Equivalent circuit of capacitor C1. (b) Capacitor current. (c) Capacitor voltage ripple.

From (23) and (24), the capacitor voltage ripple can be expressed by (28). The capacitor voltage ripple is dependent on the shoot-through duty ratio, the switching period, the load current, the capacitance, and the ESR in the capacitor.

where

C. PWM Techniques

Some PWM control techniques for effectively adjusting the shoot-through state within a zero state are introduced to boost the dc-link voltage. The relationship between M and B (or D) from (27) is dependent on the PWM control techniques. Three PWM techniques based on a carrier-based PWM are proposed in [1], [15], and [16]. These PWM techniques are referred to as the simple, the maximum, and the constant boost control methods. Given that a simple control method has a constant shoot-through time during one switching period, the voltage stress across the switching devices is relatively high. In the maximum boost control method, all of the zero states are assigned as shoot-through states [15]. Although a maximum of voltage boost at a given modulation index can be achieved, the shoot-through duty ratio has a low-frequency ripple component.

To remove the ripple in the shoot-through duty ratio and obtain a higher boost capability, the constant boost control method introduced in [16] is used in the proposed topologies. Fig. 7 shows the pulse width modulation under the constant boost control method. The three-phase reference voltages Va*, Vb*, and Vc* are generated by injecting a third harmonic voltage with 1/6th of the fundamental voltage magnitude in the sinusoidal reference voltages. The shoot-through time is adjusted by comparing two shoot-through envelope signals Vp and Vn with the carrier signal. The switching device S7 is in the conduction state during the shoot-through time, and the circuit for generating the gating signal of S7 is shown in Fig. 8.

Fig. 7.Modulation under constant boost control method.

Fig. 8.Circuit for generating the gating signal of S7.

The range of modulation index M can be extended from 1 to by the constant boost control method. The relationship between the maximum modulation index M with the shoot-through duty ratio is expressed as:

 

IV. COMPARISON OF THE AS-QZSI AND EAS-QZSI WITH OTHER TOPOLOGIES

This section describes a comparison of the boost factor, the number of components used at the impedance network, and the voltage stress of the switches between the proposed topologies and other topologies.

A. Boost Factor

Fig. 9 shows the boost factors of the classic qZSI, SL-qZSI, DA-qZSI, AS-qZSI, and EAS-qZSI, in order to compare the voltage boost capability by using (1), (2), (3), (12), and (25). The boost factors of the proposed topologies are higher than that of the classic qZSI. The boost factor of AS-qZSI is lower or higher than those of both the SL-qZSI and DA-qZSI depending on the range of the shoot-through duty ratio. The proposed AS-qZSI topology has nearly the same boost capability as the SL-qZSI. Evidently, the EAS-qZSI has the highest boost factor among the five topologies.

Fig. 9.Comparison of boost factors.

B. Comparison of the Number of Components

Table I shows a comparison of the number of passive and active components used at the impedance network of the AS-qZSI, EAS-qZSI, classic qZSI, SL-qZSI, and DA-qZSI except for the inverter and LC filter. Compared with the SL-qZSI, the AS-qZSI needs one switching device more, but it can save one inductor and two diodes. Meanwhile, the EAS-qZSI requires an additional one diode and one switching device.

TABLE INUMBER OF COMPONENTS AT IMPEDANCE NETWORK

C. Voltage Stress Across the Switching Devices

The voltage stress across the switching devices of inverter Vs is identical to the peak dc-link voltage across the inverter bridge. In order to appropriately compare the voltage stress of the five topologies, the concept of equivalent dc voltage, which is defined as the minimum dc voltage necessary to generate an output voltage, is introduced [18]. The ratio between the voltage stress across the switching devices and the minimum dc voltage is expressed as Vs/(G·Vin). Substituting (29) and the boost factors B of each topology into (27), the voltage stresses across the switching devices for the five topologies are given by

for SL-qZSI for DA-qZSI for AS-qZSI for EAS-qZSI where

Fig. 10 shows the voltage stress ratios of the five topologies with a variation of the ac voltage gain G. The classic qZSI has the highest voltage stress of the switches. The voltage stress of the proposed AS-qZSI is similar with that of the SL-qZSI at the overall range of the ac voltage gain, and the proposed EAS-qZSI has the lowest voltage stress ratio.

Fig. 10.Comparison of voltage stress ratios.

To verify the theoretical analysis of the proposed topologies, simulation studies are carried out with the PSIM program. In the simulations, all of the components are assumed to be ideal, and a three-phase resistor of 100 Ω is connected at the output terminal as load. The parameters of the power converter used in the simulation and the experiment are shown in Table II.

TABLE IIPARAMETERS USED AT SIMULATION AND EXPERIMENT

Fig. 11 shows the simulation results of the AS-qZSI under the constant boost control at M = 0.76 and D = 0.34. From Fig. 11(a), the capacitor voltages Vc1 and Vc2 are boosted to 280 V and 170 V from 40 V, respectively, and a filtered line-to-line voltage of 130 Vrms can be obtained. Fig. 11(b) shows the waveforms of the two inductor currents, the dc-link voltage, and the gating signal of the switching device S7. In the shoot-through state, the two inductor currents increase, and the dc-link voltage becomes zero. In the non-shoot-through state, the two inductor currents decrease and the dc-link voltage is 280 V, which is the same as capacitor voltage Vc1.

Fig. 11.Simulation result of AS-qZSI at M = 0.76 and D = 0.34: (a) ac voltage and current, capacitor voltages, and dc input and dc-link voltages, (b) two inductor currents, dc-link voltage, and S7 signal.

Fig. 12 shows the simulation results of the EAS-qZSI under the constant boost control at M = 0.88 and D = 0.237. From Fig. 12(a), the dc-link voltage is boosted to 280 V and the rms value of the line-to-line voltage is 150 V.

Fig. 12.Simulation result of EAS-qZSI at M = 0.88 and D = 0.237: (a) ac voltage and current, capacitor voltages, and dc input and dc-link voltages, (b) two inductor currents, dc-link voltage, and S7 signal.

B. Experimental Results

Fig. 13 shows photographs of the prototypes of both the AS-qZSI and EAS-qZSI made at the laboratory for experimental verification. The prototypes are composed of a three-phase inverter, an impedance network, an LC filter for filtering the thee-phase output voltage and current, and a control board. The proposed topologies are controlled by a 32-bit high-performance DSP with a sampling period of 100 μsec. The switching frequency of the inverter is determined to be 5 kHz, and the shoot-through state is controlled twice during one switching period Ts, as shown in Fig. 7. The experiment is carried out with the same parameters and operating conditions used in the simulations.

Fig. 13.Photographs of laboratory prototype. (a) AS-qZSI. (b) EAS-qZSI.

 

V. SIMULATION AND EXPERIMENTAL RESULTS

A. Simulation Results

Fig. 14 shows the experimental results of the AS-qZSI when M = 0.76 and D = 0.34, which are the same operating conditions as the simulation results shown in Fig. 11. As shown in Fig. 14(a), the capacitor voltage is boosted to 275 V, which is 5 V less than the capacitor voltage in the simulation results shown in Fig. 11(a) due to the voltage drop on the diodes and the parasitic components in the inductors and capacitors. The rms value of the line-to-line voltage filtered by an LC filter is 126 V, which is also slightly lower than the simulation results. Fig. 14(b) shows the experimental waveforms of the two inductor currents, the dc-link voltage, and the gating signal of the switching device S7.

Fig. 14.Experimental results of AS-qZSI at M = 0.76 and D = 0.34. (a) Line-to-line voltages, capacitor and dc input voltages. (b) Inductor currents, dc-link voltage, and S7 signal.

Fig. 15 shows the experimental results for the EAS-qZSI when M = 0.88 and D = 0.237, which are the same operating conditions as simulation results shown in Fig. 12. As shown in Fig. 15(a), the capacitor voltage Vc1 of the EAS-qZSI is nearly the same as that of the AS-qZSI. However, the shoot-through duty ratio decreases from 0.34 to 0.237. Fig. 15(b) shows the two-phase output voltages and currents filtered by the LC filter. An ac output voltage of about 148 Vrms can be generated, and the phase current lags the line-to-line voltage by 30° at the resistive load condition. Fig. 15(c) shows the experimental waveforms of the inductor and input currents, the dc-link voltage, and the gating signal of the switching device S7. The inductor current ripples are lower than those of the AS-qZSI under the same peak dc-link voltage. It can be seen that the experimental results are nearly consistent with both the theoretical analysis and the simulation results. Fig. 15(d) shows a capacitor voltage ripple of 3.5 V generated by the capacitor current variation. The capacitor voltage rapidly changes at the transition from the non-shoot-through state to the shoot-through state due to the ESR in the capacitor, and the capacitor voltage ripple component is only 1.27 % of the capacitor voltage.

Fig. 15.Experimental results of EAS-qZSI at M = 0.88 and D = 0.237: (a) line-to-line voltage, capacitor voltages, and dc input voltage, (b) ac output voltages and currents filtered by LC filter, (c) inductor currents, dc-link voltage, and S7 signal, (d) dc-link and capacitor currents, and capacitor voltage ripple.

Fig. 16 shows the efficiency of the proposed AS-qZSI and EAS-qZSI. The efficiency of the EAS-qZSI is lower than that of the AS-qZSI, because the EAS-qZSI has two more diodes.

Fig. 16.Efficiency of EAS-qZSI and AS-qZSI.

 

VI. CONCLUSIONS

This paper proposed two types of novel topologies based on the qZSI. These topologies are the AS-qZSI and the EAS-qZSI. In comparison to the classic qZSI and the DA-qZSI, the proposed AS-qZSI provides a higher boost capability and a lower voltage stress across the switching devices of the inverter by adding only one switching device and one diode in the quasi-Z-source impedance network. The boost capability and the voltage stress of the AS-qZSI are similar to those of the SL-qZSI. However, the volume and cost of the power converter can be reduced by saving one inductor and two diodes in the impedance network, although one extra switching device is required. The proposed EAS-qZSI offers a much higher boost factor and a lower voltage stress across the switching devices.

Based on the experimental results, the dc-link voltage of the proposed topologies can be boosted seven times with respect to the dc input voltage. The AS-qZSI generates a line-to-line voltage of 126 Vrms, and the line-to-line voltage of EAS-qZSI can be increased by 15 % of the AS-qZSI under the same boost factor. The efficiency of the EAS-qZSI is lower than that of the AS-qZSI, because the EAS-qZSI has two more diodes. The proposed topologies are applicable to renewable power generation with low-voltage energy sources such as photovoltaic arrays and fuel-cell stacks.