NOMENCLATURE
I. INTRODUCTION
Inductive power transfer (IPT) systems are employed in many ultra-clean, ultra-dirty environments as a power provider to transfer power from the primary side to the secondary load side over a moderate air-gap distance through magnetic coupling [1]-[9] on the basis of specific application requirements. The potential advantages of IPT systems include immunity to ice, water, and other chemicals; environmental friendliness; and zero maintenance requirement. In addition, IPT systems have been adopted in a number of applications, including in the wireless charging of biomedical implants [10], mining applications [11], underwater power supply [12], electric vehicles [13]-[20], and railway applications [21], because of their ease of use, environmental sustainability, and low lifecycle cost.
An IPT system is composed of a high-frequency AC power supply, a resonance tank, magnetic structures for inductive coupling, a pickup in the secondary side, and a rectifier load. The power supply produces an alternating electric current in the primary coil, which in turn produces a time-changing magnetic field. This variable magnetic field induces an electric current (which produces a magnetic field) in the secondary solenoid windings. The induced AC and voltage are then rectified to a direct current (DC) to recharge the battery and/or the load.
Unlike consumer electronic devices, applications such as electric vehicles and rail transit systems require a large amount of power. The transferred power capacity of single inverter-based IPT systems [22]-[23] is restricted by the constraints of power electronic devices, which may be unavailable in the market or too expansive to pursue.
To enhance the capacity of the resonant inverter source, the use of multiple inverters connected in parallel is proposed in [24]-[27]. A parallel connected system for induction heating based on a high-frequency inductor-capacitor-inductor (LCL) resonant inverter is described in [24]. This system requires no additional device for connecting inverters in parallel, and flexible power levels can be achieved by choosing the number of parallel inverters. A phase shift control power regulation approach for multiple LLC resonant inverters for induction heating is presented in [25] to regulate the output power of paralleled inverters by controlling the phases among them. A novel soft-switching high-frequency resonant inverter comprising two half-bridges connected in parallel is described in [26]. By employing a new current phasor control for changing the phase shift angle between two half-bridge inverter units, the output power can be regulated continuously under a wide range of soft-switching operations. A parallel topology, which can achieve high output power levels in a cost-effective manner for IPT systems with LCL-T resonant inverters, is proposed in [27] with high reliability of functioning even when a faulty parallel H-bridge inverter is electronically shut down.
However, low-order harmonics dramatically degrade the performance of some IPT systems, and such issue in harmonics is not effectively addressed by the aforementioned approaches. Safe levels of magnetic field exposure is a strict requirement for IPT systems and is a growing public concern. The maximum allowable field intensity at a given frequency related to the track current in an IPT system with an operating frequency of 20–100 kHz is provided in the guidelines [28] and does not vary with frequency. At the same time, the harmonics in the track current may increase the peak value of the track current, especially under light load conditions. Consequently, field intensity increases significantly that it violates the standards. Therefore, an approach to harmonic reduction should be developed to maintain magnetic field intensity within safe levels.
A novel parallel multi-inverter IPT system is presented in the current study to upgrade the power levels of IPT systems. The phase shift pulse width modulation method employed in parallel inverters is proposed to realize power regulation and selective harmonic elimination. The explicit solutions against phase shift angle and pulse width are given according to the constraint of the selective harmonic elimination equation and the required power to avoid solving the non-linear transcendental equation. Thus, the proposed method is suitable for real-time applications, especially for IPT systems with high operation frequency.
The remainder of this paper is organized as follows. The basic principle of the parallel multi-inverter IPT system is described in Section II. An analysis of selective harmonic elimination and output power regulation is performed by using the equivalent circuit of the proposed parallel multi-inverter IPT system in Section II. The experimental verifications on selective harmonic elimination, circulating current, and wide-ranging power regulation are carried out by using a 1,412.3 W 20 kHz prototype of an IPT system. The details are presented in Section III. The conclusion is finally drawn in Section IV.
II. BASIC PRINCIPLE OF PARALLEL MULTI-INVERTER
A. Topology Analysis of Parallel Multi-Inverter
The schematic diagram of the proposed parallel multi-inverter series-series (S-S)-tuned IPT system with voltage-fed H-bridge inverters is illustrated in Fig. 1. The inverter is composed of N identical H-bridge inverters connected in parallel. Each H-bridge inverter is connected in series to a link inductor Ln . The resonant and compensation capacitor CP is then connected in series to the parallel H-bridge inverter. The synthesized current flowing through the primary coil LP establishes magnetic coupling with the secondary coil. The secondary circuit consists of the pick-up coil LS , the compensation capacitor CS , and the load RL .
Fig. 1.S-S-tuned IPT system based on a parallel multi-inverter with protection devices.
The H-bridge inverters H1 – Hn produce output voltages u1 – un , which are controlled by changing the phase shift angles and pulse widths in the gate pulse signals. Accordingly, the output power of each H-bridge inverter can be regulated individually. Each inverter is equipped with a protection device composed of two anti-series-connected semiconductors [29] to isolate the fault inverter from the system.
Fig. 2 shows the equivalent circuit whose resonant angular frequency is defined as
Fig. 2.Equivalent circuit of the IPT system with a parallel multi-inverter.
To simplify the analysis of the operating principle of the proposed parallel multi-inverter system, we let Ln = L and substitute (2) into (1). The operating angular frequency of the inverter can be expressed as
where and Z1(k) = ZN(k) = Zn(k) = jkωL = Z(k).
The current of each branch and the track current can be derived by
According to [22], the reflected impedance of the secondary circuit under resonant conditions becomes purely resistive; it can be derived by
B. Topology Analysis of Parallel Multi-Inverter
1) Waveform Analysis of Voltage Source: The operating waveforms of the output voltages of the two H-bridge inverters are two identical staircases with a phase shift, as depicted in
Fig. 3. A coordinate system is constructed accordingly. Line x is the symmetrical center line of the staircase waveform. The origin is chosen at the point where line x and the abscissa (ωt) intersect. To simplify the notation, we denote the pulse width of the staircase as 2θL and the phase shift angle between the two staircases as 2θΔ . TS is the period of the fundamental voltage. The current changing rate caused by two parallel inverters with opposite output voltages is twice as large as that with one inverter with zero output, as shown in the following equation.
Fig. 3.Output voltage and current waveform of the inverters.
Therefore, θΔ and θL must meet the restriction.
The output voltage ui(t) ( i =1, 2 ) of each H-bridge inverter in one operation cycle is defined as
After applying Fourier transformation to (10), the kth-order harmonic phasor is given by
2) Harmonic Analysis: The DC bus voltage is not guaranteed to be the same in practice. Take for example E2=E , E1=(1+α)E , and N=2. By applying (11) to (6), we obtain
Let k = 1 . Then,
Let k = 3 . Then,
This research focuses mainly on eliminating the third-order harmonics because low harmonics exert a significant influence on loads with resonant filter characteristics, that is, letting the third-order harmonic phasor be equal to zero. Thus, the harmonic elimination equation is provided by
When the DC bus voltages are the same, i.e., α =0 , the solution for (15) is given by
Two solutions are derived with (16): (I) θL = π/3 and (II) θΔ = π/6 . That is to say, when satisfying one of the two conditions, the third-order harmonic current can be eliminated theoretically with the same DC bus voltage.
Take for example α =0 . By applying (11) to (6), we obtain
Let k =1 . Then,
Let k = 3 . Then,
Under condition (I), the third-order harmonic can be eliminated even with the DC bus voltage difference according to (15). The amplitude of the third-order harmonic is a function against α under condition (II).
Here, the detailed performance analysis of the third-order harmonic elimination is provided by setting α =5% and α =10% .
The design specifications of the experimental setup are listed in Table I. In the experimental evaluation, we assume that the H-bridge inverters share identical circuit parameters and power ratings.
TABLE IDESIGN SPECIFICATIONS AND CIRCUIT PARAMETERS OF IPT PROTOTYPE
Obviously, the third-order harmonic amplitude of the proposed algorithm is significantly smaller than that of the single inverter approach, which merely changes the pulse width, as shown in Fig. 4 along with the configurations in Table I and (13), (14), (18), and (19). The amplitude of the third-order harmonic (maximum of 0.7 A) of the single inverter approach is considerably larger than that of the proposed algorithm (maximum of 0.02 A). Moreover, the influence of the DC bus voltage difference on the third-order harmonic elimination is negligible.
Fig. 4.Comparison of third-order harmonic currents of the primary coil currents of the two approaches.
3) Power Regulation of IPT System: Based on (12), the fundamental phasor of the primary coil current is denoted by
According to [22], the output power of the IPT system can be expressed as
When fixing θΔ = π/6 , the third-order harmonic is eliminated. Under the restriction of (9), the range of θL is
After substituting θΔ= π/6 into (21), the range of output power Pout can be given by
Similarly, by fixing θL = π/3 , the range of θΔ is
Consequently, under this condition, the range of Pout with harmonic elimination under various settings is provided by
When a large amount of power is required, the inverters generate a pulse width ( 2θL ) of more than 2π / 3 with the same phase to increase the output power while disabling harmonic elimination. By setting θL = π and θΔ = 0 , the output power increases to
By changing the values of θL and/or θΔ , the output power of the IPT system Pout can be continuously regulated from zero to 48E2RL/π4ω2M2 with harmonic elimination and to 64E2RL/π4ω2M2 without harmonic elimination.
C. Multi-Inverter Case Study
On the basis of the two-inverter case study, another two-inverter is considered to form a four-inverter base system. The output voltage waveforms are shown in Fig. 5.
Fig. 5.Output voltage waveform of four-inverter approach.
Similar to that in (12), the Fourier transformations of the output voltages are described as
where 1(k) and 2(k) are the output voltages of the first two inverters and 3(k) and 4(k) are the output voltages of the remaining inverters. 2θΔ1 is the radian difference between the output voltages of the two-inverter system, as shown in Fig. 5. The phasor of the primary coil current can be derived from (6).
Evidently, θΔ1 can be simply set to zero to double the output power relative to that of the two-inverter system. As discussed previously, as long as θL and θΔ meet the restriction of the third-order harmonic elimination, the output current of the four-inverter system does not exhibit the third-order harmonic. Through a careful design, another harmonic can be eliminated as well. Take for example the fifth-order harmonic. The harmonic elimination equation is given by
Combining (16) and considering the changing rate of the branch current, the track current of proposed approach against various settings is shown in Fig. 6.
Fig. 6.Primary coil current response of the proposed approach against θL , θΔ , and θΔ1 .
① Setting θΔ = π / 6 and θΔ1 = π / 10 , let θL change from 0 to 7π / 30 with the third- and fifth-order harmonic elimination.
② Setting θΔ = π / 6 and θL = 7π / 30 , let θΔ1 decrease from π / 10 to 0 with the third-order harmonic elimination.
③ Setting θΔ = π / 6 and θΔ1 = 0 , let θL change from 7π / 30 to π / 3 with the third-order harmonic elimination.
④ Setting θL = π / 3 and θΔ1 = 0 , let θΔ decrease from π / 6 to 0 with the third-order harmonic elimination.
⑤ Setting θΔ = 0 and θΔ1 = 0 , let θL increase from π / 3 to π / 2 without any harmonic elimination. The output power increases to the maximum.
We must clarify that the number of parallel inverters to be used is determined by the following factors.
1. The capacity ( Seach ) of each inverter should be slightly greater than 1/ N of the power demand required by the load with consideration of the circulating current flowing among the inverters. N is the number of parallel inverters. Therefore, when the capacity of each inverter is large, only a few inverters are needed given the same power requirement.
2. The number of parallel inverters is also decided by the number of harmonics to be eliminated. As discussed in this paper, at least 2N' inverters are needed to eliminate N' orders of harmonics.
D. Analysis of Circulating Current
Take the two-inverter-based model for example. According to [30], the circulating current between the first and the second H-bridge inverter (Fig. 7) can be expressed by
Fig. 7.Circulating current between two inverters.
By substituting (5) into (30), the fundamental circulating current phasor can be expressed as
According to (31), the circulating current obviously relates to the operating angular frequency ω , the link inductance of the H-bridge inverter L , the DC voltage source E , and the phases θL and θΔ . When satisfying the elimination conditions ( θΔ = π/6 or θL = π/3 ), the circulating current phasor derived from (31) varies in the range of
Therefore, by choosing proper link inductors and by enlarging the value of link inductance, the circulating current between two inverters is effectively controlled.
E. Control Diagram
The control block diagram is shown in Fig. 8. The DC load voltage is sent to the controller in the primary side via a wireless data sender. The load voltage and reference voltage are treated as inputs to the PI controller to yield the control parameters θL and θΔ , which are used to generate the pulse width for the H-bridge inverter.
Fig. 8.Control block diagram.
If any inverter becomes faulty, then its fault signal is sent to the controller to isolate this branch and thereby ensure that the other parts of the system work continuously. In this way, reliability is improved dramatically. The inverters do not perform the harmonic elimination method, and they work under the condition in which their output voltages are controlled to be in phase with the same pulse width.
III. EXPERIMENTAL RESULTS
A. Prototype System
To validate the proposed approach, we construct an experimental IPT prototype in the laboratory. The prototype comprises two identical H-bridge inverters connected in parallel and is designed to operate up to 1412.3 W in the experiment. Its functions include selective harmonic elimination and power regulation by changing the output voltage pulse width and phase shift angles.
The exterior appearance of the experimental setup is shown in Fig. 9 and Fig. 10. The TMS320F28335 digital signal processing unit (DSP, Texas Instrument) is used to generate the gate pulse signals for the semi-conductors. The primary coil (L: 32 cm, W: 31.1 cm) on the bottom and the secondary coil (L: 24 cm, W: 31.1 cm) on top are made of U-shaped ferrite. The distance between the primary coil and the secondary coil is about 10 cm. The two coils are mounted to the acrylic board for mechanical support. MOSFETs (AP80N30W) and a gate driver (CONCEPT-2SC0108T2A0-17) are adopted for the H-bridge inverters. The DSP unit is utilized as the controller of the IPT system to achieve control and protection functions among others.
Fig. 9.Exterior appearance of the proposed IPT prototype.
Fig. 10.Primary and secondary coils wound with a Litz wire.
The two H-bridge inverters are separately powered by two isolated DC supplies, and their AC outputs are connected in parallel to provide transmitting current in the primary coil compensated by a series capacitor. An electronic load is employed as the secondary load connected to the rectifier.
The experimental waveforms are measured and displayed by using an Agilent MSO-X 4034A scope, which allows built-in harmonic analysis. The efficiency of the system is analyzed with a YOKOGAW WT1800 power analyzer.
B. Experimental Results
To provide a clear comparison of different operating conditions, we show in Fig. 11 the experimental values of the output power, load consumption, and transmission efficiency of the IPT system against the output power.
Fig. 11.Input power and overall system efficiency against the output power.
The wide-ranging output power regulation can evidently be achieved by changing the phase shift angle and pulse width of the proposed approach and by changing the pulse width of the single inverter approach (Fig. 11). The output powers of the two inverters are approximately the same (about half of that of the single inverter approach) despite their difference resulting from the presence of a phase shift between them. Consequently, a circulating current exists between the two inverters and results in the occurrence of a loss and a decrease in efficiency, as shown in Zones 1 and 2. At Zone 3, the overall efficiency of the proposed approach increases up to 90.602% at an output power of 1,412.3 W. This value is nearly the same as that of the single inverter approach.
The THD of the proposed algorithm is significantly smaller than that of the single inverter approach, and the third-order harmonic of the proposed approach is dramatically suppressed under various output power conditions, as shown in Fig. 12. In Zones 1 and 2, the THD of the track current of the proposed approach is maintained within 2%, whereas in Zone 3, the THD increases because the proposed approach cannot eliminate the third-order harmonic in this zone. The blue line (THD1) represents the THD value of the single inverter approach, and the red line (THD2) represents the THD value of the proposed algorithm. The third-, fifth-, and seventh-order harmonics are suppressed by the proposed algorithm in Zones 1 and 2 but not in Zone 3, as shown in Fig. 12(b) and (c).
Fig. 12.Comparison of THD and normalized RMS of the primary coil current of the two approaches: (a) THD values of the two approaches, (b) normalized RMS of the primary coil current of the single inverter approach, and (c) normalized RMS of the primary coil current of the proposed approach.
Unlike the single inverter approach, the proposed algorithm can dramatically suppress the third-order harmonic of the experiment even with different DC bus voltages, as shown in Fig. 13. The output power of the experiment measured with the prototype is provided in Fig. 14. The output power can be continuously regulated from almost 0 W to 1,400 W by changing the value of θL and/or θΔ . The comparison of the waveforms of the two approaches indicates that the proposed approach dramatically suppresses the harmonic and nearly eliminates the third-order harmonic. The same result is obtained in the theoretical analysis. The overall efficiency of the proposed approach is about 82.9%, as shown in Fig. 15. The waveforms of the current and voltage of the IPT system, as well as the overall efficiency (90.602%), under the maximum output power point (1,412.3 W) are shown in Fig. 16. Other working points are shown in Fig. 11.
Fig. 13.Comparison of normalized RMS of the third-order harmonic of the primary coil current of the two approaches.
Fig. 14.Output power against θΔ and θL .
Fig. 15.Measurement of the key system waveforms of the two approaches at Pout = 388.4 W. (a) Waveforms of output voltage, the primary track current, and the harmonic analysis of the single inverter approach. (b) Waveforms of the output voltage, the primary track current, and the harmonic analysis of the proposed approach. (c) Overall efficiency of the proposed approach measured with a power analyzer.
Fig. 16.Measurement of the key system waveforms of the two approaches at Pout = 1,412.3 W. (a) Waveforms of output voltage, the primary track current, and the harmonic analysis of the single inverter approach. (b) Waveforms of output voltage, the primary track current, and the harmonic analysis of the proposed approach. (c) Overall efficiency of the proposed approach measured with a power analyzer.
The dynamic response is provided in Fig. 17. The reference voltage of the load changes from 50 V to 70 V and then back to 50 V, as shown in Fig. 17(a). The response of the proposed algorithm is fast, taking about 18 ms to reach 70 V and 17.5 ms to return to 50 V.
Fig. 17.System response with a step change. (a) Step change of reference voltage from 50 V to 70 V and then back to 50 V. (b) Step change of load resistance from 8 Ω to 10 Ω and then back to 8 Ω.
The load resistance change test is performed, and the dynamic response of the proposed algorithm is given in Fig. 17(b). The proposed algorithm converges to 50 V in 16 ms with the load resistance changing from 10 Ω to 8 Ω and in 17 ms with the load resistance changing from 8 Ω to 10 Ω.
The waveforms of the current and voltage of the IPT system are shown in Fig. 18 with the operation of the protection device of inverter 2. At the beginning, the voltage of the load at the secondary side is set to 30 V. When a fault occurs in inverter 2, inverter 2 is cut off by the protection device while inverter 1 continues to operate. After 17 ms, the load voltage returns to 30 V despite the voltage drop. Clearly, the proposed algorithm can remove the faulty H-bridge inverter and improve system reliability.
Fig. 18.Waveforms when a fault occurs in H-bridge inverter 2.
IV. CONCLUSIONS
A novel power regulation control approach with selective harmonic elimination based on a parallel multi-inverter for IPT systems is proposed in this work. The operating principle of harmonic elimination and power regulation is explained and described in detail. By changing the output voltage pulse width and the phase shift angle of the inverters, the third-order harmonic current of the primary coil could be eliminated while continuously regulating the IPT output power. A 1,412.3 W experimental prototype is set up and tested. The experimental results verify the performance of the proposed control approach, which is suitable for high-power IPT applications with various power requirements. Moreover, the output of the proposed approach involves a lower harmonic distortion under light load conditions in comparison with that of the single inverter approach. A protection scheme is provided to improve the reliability of the proposed system. The test results also show that the output voltage can be maintained to the desired value even in cases of faults, which are removed by the protection device.
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