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A Quantitative Evaluation and Comparison of Harmonic Elimination Algorithms Based on Moving Average Filter and Delayed Signal Cancellation in Phase Synchronization Applications

  • Xiong, Liansong (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University) ;
  • Zhuo, Fang (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University) ;
  • Wang, Feng (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University) ;
  • Liu, Xiaokang (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University) ;
  • Zhu, Minghua (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University) ;
  • Yi, Hao (State Key Lab of Electrical Insulation and Power Equipment, Xi'an Jiaotong University)
  • 투고 : 2015.03.31
  • 심사 : 2015.10.06
  • 발행 : 2016.03.20

초록

The harmonic components of grid voltage result in oscillations of the calculated phase obtained via phase synchronization. This affects the security and stability of grid-connected converters. Moving average filter, delayed signal cancellation and their related harmonic elimination algorithms are major methods for such issues. However, all of the existing methods have their limitations in dealing with multiple harmonics issues. Furthermore, few studies have focused on a comparison and evaluation of these algorithms to achieve optimal algorithm selections in specific applications. In this paper, these algorithms are quantitatively analyzed based on the derived mathematical models. Moreover, an enhanced moving average filter and enhanced delayed signal cancellation algorithms, which are applicable for eliminating a group of selective harmonics with only one calculation block, are proposed. On this basis, both a comprehensive comparison and a quantitative evaluation of all of the aforementioned algorithms are made from several aspects, including response speed, required data storage size, sensitivity to sampling frequency, and elimination of random noise and harmonics. With the conclusions derived in this paper, better overall performance in terms of harmonic elimination can be achieved. In addition, experimental results under different conditions demonstrate the validity of this study.

키워드

I. INTRODUCTION

The extensive utilization of non-linear power equipment has led to severe harmonic pollution in power grids [1]-[3]. When a utility signal is seriously distorted by harmonics, it is virtually impossible for phase synchronization control to acquire the accurate synchronous phase of a power grid. Therefore, the security and stability of grid-connected converters cannot be ensured [2]-[4]. Consequently, performing accurate phase synchronization under distorted grid conditions has become a major concern in both industrial applications and in the research field [5]-[8].

Phase synchronization is mainly achieved in the rotational d-q frame [9]-[18]. The three phase utility signal in the stationary a-b-c frame is converted to a DC component in the d-q frame. After this, a proportional-integral (PI) regulator is utilized to eliminate the q-axis component through closed-loop feedback control. Thus, the synchronous phase is obtained. The above method, which employs a PI controller to eliminate the steady state error, fails to respond to utility signals with harmonic components. In this situation, oscillations are imposed on the q-axis DC component. In this case, the exact synchronous phase can be obtained by extracting and utilizing the DC part of the q-axis component as the input of a PI controller, which eliminates the effect of harmonics [10]-[13]. The most commonly used method of harmonic attenuation is adding a low-pass filter (LPF) in the control loop [9]-[14]. However, two contradictory factors, i.e. the harmonic attenuation ability and the dynamic response speed, have to be taken into account in the design of the LPF parameters [10], especially when dealing with a utility signal with a high content of low-order harmonics. However, in practice, it is difficult to find a compromise. In addition, the effect of a LPF on harmonic attenuation is somewhat limited.

Complete harmonic elimination can be achieved if the periodical and centro-symmetric properties of a harmonic signal are utilized. The main methods for doing this are Moving Average Filter (MAF) [15], Delayed Signal Cancellation (DSC) [16-17] and MAF/DSC based algorithms such as Cascaded DSC (CDSC) and Cascaded MAF (CMAF) [18]-[21]. The use of MAF is beneficial for filtering out high frequency random noise, especially when the noise is periodical [15]. An arbitrary harmonic, which can be regarded as a periodic noise signal at a certain frequency, can be eliminated completely by MAF with a properly designed window length. The DSC method with a time delay of a quarter grid cycle is proposed in [16] to eliminate the effects of the 2nd harmonic in the d-q frame. This improves the accuracy of synchronized phase in distorted utilities. Cascaded DSC (CDSC) blocks with different time delays [17], which are able to eliminate several harmonics, are widely used in areas of harmonic detection [18], phase synchronization [19], [20] and power quality improvement [21].

MAF/DSC based algorithms are the typical methods to achieve thorough elimination of harmonics. However, the above methods have their own pros and cons in dealing with multiple harmonics issues. DSC based algorithms suffer from a discretization error. As a result, the high-order harmonics cannot be eliminated adequately [22]. The linear interpolation method proposed in [16], [17] can partially mitigate the discretization error at the cost of increased computational effort. The authors of [22] pointed out that DSC based algorithms provide higher design flexibility than MAF based algorithms. However, MAF based algorithms require minimum computational effort for implementation [23]. To eliminate a group of specific harmonics, the existing MAF/DSC based algorithms cannot achieve the shortest possible response time [16], [22]. This issue can be solved by the proposed Enhanced MAF (EMAF) and Enhanced DSC (EDSC) algorithms. They are applicable for eliminating such harmonics with only one calculation block, and they can achieve the shortest possible response time in most cases.

After reviewing the literature, it is clear that a specific algorithm, which is always characterized by its own superiority/inferiority, should be properly chosen for a particular application to avoid unnecessary computational effort and to achieve the shortest possible response time in specific grid scenarios, particularly when the selective cancellation of some specific components is needed. However, few papers have presented a comprehensive performance comparison and quantitative evaluation of the existing MAF/DSC based harmonic elimination algorithms. Therefore, optimal algorithm selection and better overall performance of harmonic elimination is unavailable. Focusing on such issues, this paper presents a detailed analysis, comparison and evaluation of the existing MAF/DSC based algorithms in different indexes such as response time, data storage size, sensitivity to sampling frequency, and elimination of random noise and harmonics.

 

II. PHASE SYNCHRONIZATION SCHEME AND THE EFFECTS OF GRID HARMONICS

A. Phase Synchronization Scheme

The ideal voltage signal of a three-phase power system can be expressed as:

where, Um, θ, and ω are the amplitude, initial phase, and frequency of the utility signal, respectively.

In this paper, τ=2π/3.

Consequently, the synchronous phase can be described as:

Similarly, the relationship between the estimated grid phase and the estimated initial phase angle extracted by the phase synchronization schemes, can be depicted as:

The Park transformation is given by:

By substituting (1) into (4), the utility signal in d-q frame yields:

when the steady state is achieved. A diagram of the closed-loop phase synchronization scheme in the d-q frame [8] is obtained, and shown in Fig. 1.

Fig. 1.Diagram of closed-loop phase synchronization scheme.

When it is assumed that (5) can be rewritten as:

Substituting (6) into (2), the grid phase can be calculated by:

where:

Therefore, the open-loop phase synchronization scheme in the d-q frame [24], [25] is obtained, as shown in Fig. 2. This is characterized by a simple structure, easy implementation, strong adaptability and the shortest response time [24], [25]. Therefore, the open-loop phase synchronization scheme is selected to verify the validity of this study.

Fig. 2.Diagram of open-loop phase synchronization scheme.

B. Effect of harmonics on phase synchronization

When harmonic distortion is present, the three-phase grid voltage signal can be expressed as:

where, n is the harmonic order, and Umn and φn are the amplitude and initial phase angle of the nth harmonic, respectively.

By substituting (8) into (4), the distorted signal yields:

According to (9), harmonic components, with 1 order lower than those in the a-b-c frame, exist in the d-q frame when the utility signal is distorted. When the 2nd harmonic is present in the grid voltage, a fundamental harmonic is imposed on the DC components in the d-q frame [10]. If the q-axis component is still controlled to zero through a feedback loop, oscillations occur in the output of the phase synchronization, leading to phase errors. Moreover, the phase errors will be notable when dealing with distorted signals with a high content of low-order harmonics.

The effect of harmonics can be completely eliminated by obtaining the DC part of the q-axis component and using this signal as the input of the PI regulator. MAF/DSC based algorithms are commonly used ways to achieve this. In the following sections, a detailed analysis, comparison and evaluation of all of the existing MAF/DSC based algorithms are performed and the corresponding conclusions can help designers select the optimal algorithm and achieve better overall performance in terms of harmonics elimination for specific applications.

It should be noted that the nth harmonic in the next parts refers to the harmonic in the d-q frame where the harmonic elimination algorithm is performed. This component corresponds to the (n+1)th harmonic in the a-b-c frame.

 

III. QUANTITATIVE ANALYSIS OF MAF BASED HARMONIC ELIMINATION ALGORITHMS

A. Conventional MAF Based Algorithms

MAF is extremely effective in eliminating periodic noise. It is obvious that the harmonic can also be eliminated by MAF if it is regarded as a periodic noise signal [15]. For the convenience of depiction, MAFn is used to denote the MAF for eliminating the nth harmonic.

A mathematical model of the MAFn can be expressed as:

where, Tn is the period of the nth harmonic (which is also selected as the period of the average window).

Assume the sampling time Ts of the system yields Ts≪Tn. Accordingly, (10) can be discretized as:

where, the window length Ln can be expressed as the ratio between Tn and Ts (rounded to the nearest integer), i.e.:

The results in (11) can be explained by the wave shape of the harmonic. The summation of all of the samples in one harmonic cycle is zero, since the harmonic is centro-symmetrical in a period, and the positive and negative samples tend to cancel each other out, leading to remarkable performance of the MAF in eliminating harmonics [15].

For the nth harmonic, the response time of the MAFn is one harmonic period Tn, as shown in Fig. 3. The harmonic is attenuated sufficiently during the dynamic process, and will be eliminated completely in the steady state.

Fig. 3.Effect of MAF on eliminating a given harmonic in the (a) continuous-time domain. (b) discrete-time domain.

The Cascaded MAF (CMAF) can be utilized if several harmonic components need to be eliminated. The total response time of CMAF TCMAF is the summation of all the MAFs in the cascade. If harmonic components with orders not greater than N are to be eliminated, the response time yields:

It can be readily seen that TCMAF becomes longer with increased harmonic components. In extreme cases, TCMAF tends to infinity when N keeps increasing. Such long time delays and huge data sizes are unacceptable in practice.

B. Proposed EMAF Algorithms

If the window length of the MAFn is extended to ZnLn (Zn = 1, 2, 3⋯), (11) can be rewritten as:

According to (14), the nth harmonic can be eliminated if the window length of the MAFn is an integer multiple of the number of samples per period. Accordingly, the response time is extended to ZnLn. By properly choosing the window length, one single MAF block can be designed to simultaneously eliminate a group of given harmonics. This MAF is defined as an Enhanced MAF (EMAF) in this paper.

The window length of the EMAF, according to (14) and its conclusions, yields:

where n is the order of harmonic to be eliminated and Z+ is a set of positive integers.

The corresponding relation in the time domain is given by:

where TEMAF is the dynamic response time of the EMAF.

Obviously, LEMAF and TEMAF are the common multiples of the window lengths and response time of the corresponding MAF blocks, respectively. In particular, the lowest common multiples are chosen to improve the response speed.

Fig. 4 demonstrates the aforementioned requirements of the EMAF by eliminating 5 kinds of harmonics. For Harmonic 1, 8 harmonic periods are covered by the moving length TEMAF. Therefore, it can be filtered out by the EMAF. Similarly, the moving length TEMAF of the MAF covers 3 periods of Harmonic 3 and one period of Harmonic 5. As a result, they can be completely filtered out by the EMAF. However, complete cancellation within TEMAF cannot be realized for Harmonic 2 or Harmonic 4, as shown in the blank areas directed by the red arrows in Fig. 4. Therefore, they cannot be filtered out thoroughly

Fig. 4.Effect of EMAF in filtering out a specific harmonic.

Moreover, following rules hold by summarizing the different response time with respect to harmonics:

1) To eliminate all of the even harmonics, TEMAF is T/2;

2) To eliminate all of the odd harmonics, TEMAF is T;

3) To thoroughly eliminate all of the even and odd harmonics simultaneously, TEMAF is T.

In order to illustrate how the EMAF is operated in the d-q frame, (9) is discretized as:

Performing the EMAF algorithm on both sides of (17) yields:

LEMAF in (18) can be calculated by:

By employing the conclusions of (14) and (15), (18) can be simplified as:

where:

It should be noted that the response times of the EMAF and CMAF are usually different for a given combination of harmonics, leading to different algorithm choices.

Some examples are:

1) To eliminate the 5th and 7th harmonics, the minimum TEMAF is T, while TCMAF is 12T/35. Therefore, the CMAF is better;

2) To eliminate the 2nd, 4th, and 6th harmonics thoroughly, the minimum TEMAF is T/2, while TCMAF is 11T/12. Therefore, the EMAF should be chosen;

3) To eliminate the 3rd, 6th, 9th, and 12th harmonics thoroughly, the minimum TEMAF is T/3, while TCMAF is 25T/36. Therefore, the EMAF is better and.

Generally, the higher the content of low-order harmonics, the more advantage the EMAF has in terms of response speed, and vice versa.

The EMAF algorithm is applicable for eliminating multiple specific harmonics with only one calculation block and can achieve the shortest possible response time in most cases.

 

IV. QUANTITATIVE ANALYSIS OF DSC BASED HARMONIC ELIMINATION ALGORITHMS

A. Conventional DSC Based Algorithms

DSC is another typical harmonic elimination method that is only effective for periodical signals with centro-symmetry. The harmonics in a utility signal are typical periodical signals with centro-symmetry. This property is utilized in the design of the DSC blocks when harmonics are to be eliminated [16].

Similarly, the DSCn is utilized to designate the DSC block for eliminating the nth harmonic. The DSCn can be expressed in both the continuous and discrete-time domains as [17]:

where the relationship between Tn and Ln yields (12).

Obviously, the response time of the DSCn is Tn/2 (in the discrete time domain the delay length is Ln/2), as shown in Fig. 5. The harmonic is sufficiently attenuated during the transient, and is almost totally cancelled by the DSCn in the steady state.

Fig. 5.Effect of DSC on eliminating a given harmonic in the (a) continuous-time domain. (b) discrete-time domain.

Like the CMAF, the Cascaded DSC (CDSC) can be utilized if several harmonics are to be eliminated. In this case, the overall response time TCDSC is a summation of all of the cascaded DSC blocks. If all of the harmonics with orders not more than N are to be eliminated, TCDSC is only half of TCMAF. In addition, where there are more harmonics, the longer response times and larger data sizes are needed, which will become a bottleneck for practical use.

B. Proposed EDSC Algorithms

If the delay length of the DSCn is increased by (Zn−1)Ln, (24) can be rewritten as:

where k≫(2Zn−1)Ln/2.

According to (25), the nth harmonic can be eliminated when the delay length of the DSCn block is (2Zn−1)Ln/2. Consequently, the response time of the DSCn is extended to (2Zn−1)Tn/2.

By properly designing the delay length, several harmonics can be eliminated simultaneously using a single DSC block. This is defined as Enhanced DSC (EDSC).

According to the conclusions of (25), the delay length of the EDSC LEDSC and the response time TEDSC can be calculated as:

Obviously, 2LEDSC and 2TEDSC are common multiples of the delay lengths and response times of the DSCn blocks, respectively. Moreover, the ratio of 2LEDSC to Ln, i.e. (2Zn−1), is an odd number for each n, as is the ratio between 2TEDSC and Tn. To improve the response speed, 2LEDSC should be chosen as the minimum common multiple.

If no 2LEDSC can agree with (26) for a group of given harmonics, these harmonics must be divided into several sub-groups, and each sub-group must have a 2LEDSC that agrees with (26). Every sub-group share an EDSC block and all of the EDSC blocks in cascade, which can eliminate the above group of harmonics. Some examples are:

1) To eliminate the 3rd and 5th harmonics thoroughly, TEDSC is chosen as half a grid cycle T/2, and the corresponding ratios are 3 and 5 which are both odd numbers. The dynamic response time of the EDSC is T/2 in this case.

2) To eliminate the 2nd, 4th, 6th, 10th, 12th, and 20th harmonics thoroughly, they must be divided into two sub-groups, and two EDSC blocks in cascade are utilized: one with a delay T/4 for eliminating the 2nd, 6th, and 10th harmonics, and the other with a delay T/8 for eliminating other harmonic components. The corresponding ratios are 1, 3, and 5 for both of the EDSC blocks. The total response time is the sum of the two blocks, i.e. 3T/8.

For the EDSC, it holds that [21]: 1) by delaying T/2, all of the odd harmonics can be eliminated simultaneously; and 2) by delaying T/2(k+1) (k=1, 2, 3 ⋯), all of the even harmonics with the order n=i×2k (i=1, 3, 5⋯) can be eliminated simultaneously.

Consequently, the total response time of the EDSC TEDSC, considering the elimination of all the arbitrary harmonics, is:

It is evident from (28) that the arbitrary orders of the harmonics can be eliminated by delaying a grid cycle T with the EDSC blocks.

Generally, odd harmonics are most common in power grids. In the a-b-c frame, by delaying T/4, all of the odd harmonics with the order n=2i+1 (i=1, 3, 5 ⋯) can be eliminated, i.e. the 3rd, 7th, 11th, 15th, and 19th harmonics and so on. Similarly, by delaying T/8, the odd harmonics with the order n=4i+1 are eliminated, i.e. the 5th, 13th, and 21st components and so on. By delaying T/16, the odd harmonics with the order n=8i+1 can be eliminated, i.e. 9th and 25th, etc. Therefore, an effective harmonic suppression strategy, i.e. cascading the aforementioned EDSC blocks and using an extra LPF, is obtained. With a delay of 7T/16 (which is less than half a grid cycle), all of the odd harmonics with an order of not more than 15 are eliminated by the above EDSC blocks. The higher-order harmonics can be sufficiently suppressed by the application of a LPF.

In practice, selection between the EDSC and the CDSC depends on the harmonics to be eliminated.

Some examples are:

1) To eliminate the 3rd and 5th harmonics thoroughly, the response times for the EDSC and CDSC are T/2 and 4T/15, respectively. Hence, the CDSC should be chosen.

2) To eliminate the 1st, 3rd, and 5th harmonics thoroughly, the response times for the EDSC and CDSC are T/2 and 23T/30, respectively. Hence, the EDSC is better.

3) To eliminate the 2nd, 4th, 6th, 10th, and 12th harmonics thoroughly, the response times for the EDSC and CDSC are 3T/8 and 11T/20, respectively. Hence, the EDSC should be chosen.

Generally, the EDSC scheme is better for processing distorted signals with a high content of low-order harmonics, and vice versa.

 

V. COMPARISON AND EVALUATION OF MAF/DSC BASED ALGORITHMS

The five aspects of dynamic response time, required data storage size, attenuation rate of the harmonic amplitude, sensitivity to sampling frequency, ability of harmonic and noise elimination, are considered in the comprehensive comparisons and quantitative evaluations of the MAF/DSC based harmonic elimination algorithms, i.e. CMAF, CDSC, EMAF, and EDSC.

A. Dynamic Response Time and Data Storage Size

It can be readily seen from (12) that the required data storage size L is proportional to the transient time. Hence, the analysis results of the response time also apply to the data storage size.

To evaluate the response time, an application scenario is assumed where the orders of the harmonics to be eliminated are not bigger than 30. Fig. 6 demonstrates the results of the dynamic response time using the different algorithms. The horizontal axis represents the orders of the harmonics which are to be eliminated, and the vertical axis is the ratio of the response time to the grid cycle. Fig. 6 (a), (b), and (c) refer to the cases of eliminating all of the harmonics, all of the odd harmonics, and all of the even harmonics, respectively.

Fig. 6.Response times in eliminating. (a) all harmonics. (b) all odd harmonics. (c) all even harmonics.

By evaluating the response times in various scenarios, following conclusions can be obtained:

1) TMAF is twice TDSC for eliminating a specific harmonic;

2) TCMAF is twice TCDSC in all of the cases;

3) The response speed of the EDSC is quicker than that of the EMAF, especially with few low-order harmonics. When the number of harmonics to be eliminated increases, the response speeds of the EMAF and EDSC tend to be closer. When all of the odd harmonics are to be eliminated, the response speed of the EDSC is twice that of the EMAF;

4) To eliminate all of the harmonics or all of the even harmonics, the response speed of the EDSC is slightly faster than that of the EMAF. The EMAF is easier in terms of implementation. However, the EDSC blocks can be utilized in cascade;

5) To eliminate all of the odd harmonics, the response speed of the EDSC is dominant over the EMAF. Therefore, the EDSC is better;

6) The response speeds of the EMAF and EDSC are quicker than those of the CMAF and CDSC, in general;

7) To eliminate all of the harmonics, the limit of the transient time for the filtering algorithm is a grid cycle T.

Based on the above conclusions, the response times of the open-loop and closed-loop phase synchronization schemes have the following rules:

1) The dynamic of open-loop phase synchronization only consists of harmonic elimination and noise suppression. The response time of the LPF for filtering out high frequency noise is usually short. Hence, the response time of the harmonic elimination is dominant in the overall transient time of open-loop phase synchronization.

2) However, the transient of closed-loop phase synchronization mainly depends on the closed-loop regulator, which in turn interferes with the dynamic behaviors of the harmonic and noise elimination. This results in complexity in estimating the total transient time. Experimental results indicate that the EMAF and EDSC have proximate transient times, which depend mainly on the closed-loop regulator.

Considering that the EMAF is easier to realize, and that the output phase is more stable owing to a smaller oscillation amplitude compared with the EDSC, it is more suitable to utilize the EMAF in closed-loop phase synchronization.

B. Attenuation Rate of Harmonic Amplitude

Based on (8), the nth harmonic can be expressed as:

To evaluate the harmonic amplitude attenuation rate in the transient and steady state, both the DSC and MAF are studied.

Case 1: DSC based algorithms

During the transient, t < Tn /2 and k < Ln/2. Therefore, hn(k- Tn/2)=0 and:

The mth (m ≠ n) harmonics, which cannot be eliminated by the DSC based algorithms, also satisfy (30). Hence, for all of the harmonics processed by the DSC based algorithms, the amplitudes can be reduced by 50% during the transients.

In the steady state, t > Tn /2 and k > Ln/2. Therefore, for the nth harmonics, hn(t )=0. For the mth (m ≠ n) harmonics, it holds that:

where:

Moreover, it holds that:

Let Umm be the base value. Then the per-unit amplitude value of the mth harmonics in the steady state can be obtained as:

To evaluate the harmonic amplitude attenuation rate of the DSC algorithm in the steady state, an application scenario is assumed where the orders of the harmonics to be eliminated are not bigger than 30. Fig. 7 demonstrates the harmonic amplitude rate using the DSC algorithm. The horizontal axis m represents the orders of harmonics to be eliminated by the DSCn, and the vertical axis is the amplitude attenuation rate of the mth harmonic.

Fig. 7.Harmonic amplitude with DSC in steady state.

From Fig. 7 and (33), it is evident that the harmonics with the order m= (2k+1)n (k=0, 1, 2 ⋯) can be attenuated to 0 in the steady state, and that the harmonics with the order m=2kn (k=0, 1, 2 ⋯) cannot be attenuated at all. It is also apparent that the harmonic with an order close to (2k+1)n will tend to be eliminated, while in another case the harmonic will be virtually unaffected with an order of approximately 2kn.

Case 2: MAF based algorithms

During the transient, it holds that t

The mth (m ≠ n) harmonics, which cannot be eliminated by the DSC based algorithms, also satisfy hm(t-Tn)=0. Hence:

Fig. 8 demonstrates the harmonic amplitude during transients using the MAF algorithm. The DSC can only reduce the harmonic amplitude to 0.5 p.u. (see the purple line) while the MAF can make the harmonic amplitude lower than 0.159 p.u. (see the yellow line) in most cases. Obviously, the general harmonic amplitude attenuation rate of the MAF is much bigger than that of the DSC. This figure also shows that the larger n is, the better the performance the MAF algorithm becomes.

Fig. 8.Harmonic amplitude with MAF in transient.

In the steady state, t > Tn and k > Ln. Therefore, for the nth harmonics, hn(t)=0. For the mth (m ≠ n) harmonics, it holds that:

where:

Choose Umm as the base value. Then the per-unit amplitude value of the mth harmonic in the steady state can be obtained as:

Fig. 9 demonstrates the harmonic amplitude with the MAF algorithm. It is evident that the harmonics with the order m=kn (k=0, 1, 2 ⋯) can be attenuated to 0 in the steady state, and that all of the other harmonics can be attenuated sufficiently. It is apparent that the harmonics with an order closer to kn tend to be eliminated more adequately.

Fig. 9.Harmonic amplitude with MAF in steady state.

Case 3: Comparison of amplitude attenuation rate

Fig. 7 illustrates a comparison of the amplitude attenuation rate in the transient state. The performance of the MAF based algorithms is far better than that of the DSC based algorithms under most conditions.

To compare the amplitude attenuation rate in the steady state, the corresponding attenuation indicator F is first defined as:

Obviously, F>1 means that the MAF based algorithm is better than the DSC based algorithm in terms of steady-state performance, and vice versa. Fig. 10 demonstrates the attenuation indicator F, which is also a comparison of amplitude attenuation rate in the steady state. The numerical calculation result illustrates that F ≥1. Therefore, the ability of the MAF based algorithms to fully attenuate the harmonic amplitude is generally far stronger than that of the DSC based algorithms. From this perspective, the MAF based algorithms should be selected first.

Fig. 10.Attenuation indicator in steady state.

C. Sensitivity to Sampling Frequency

Usually, the MAF is implemented by a digital controller in the discrete-time domain. A problem arises when the harmonic’s period Tn is not divisible by the sample period Ts. In practical applications, the sampling frequency fs is usually determined by other control requirements, such as the losses or the size of power-electronic converters. In this situation, the nearest sample point is usually used to approximate accurate values, as illustrated in (12) and Fig. 11.

Fig. 11.Discretization time error between continuous mode and discrete mode. (a) Ceiling rounding. (b) Floor rounding.

The sampling error caused by (12) can be expressed as:

where, ∆T ∈ (-0.5Ts, 0.5Ts] is the time discretization error.

Therefore, a discretization error between the continuous mode and the discrete mode is inevitable and thorough harmonic elimination cannot be achieved. To evaluate the sensitivity of the DSC/MAF based algorithms to sampling frequency this paper first derives the general expression of the detection error introduced by the non-ideal discrete time.

Based on (8) and (29), the nth harmonic, which can be thoroughly eliminated in theory, is rewritten in phasor form as:

Substitute (39) into (23), and it holds that:

Hence, the per-unit amplitude value of the nth harmonic eliminated by the DSC based algorithms in the steady state is given as:

Similarly, substitute (39) into (10), and it holds that:

Hence, the per-unit amplitude value of the nth harmonic eliminated by the MAF based algorithms in the steady state is given as:

To evaluate the discretization error and sensitivity to the sampling frequency in the steady state, the maximum possible error (∆T=0.5Ts) is considered. The application scenario where the orders of the harmonics to be eliminated are not bigger than 30 is assumed. Fig. 12 and Fig. 13 demonstrate the per-unit amplitude values of the nth harmonics, which are caused by the discretization error of the DSC/MAF based algorithms. The horizontal axis represents the sampling frequency, and the vertical axis is the per-unit amplitude value of the nth harmonics.

Fig. 12.Harmonic amplitude error with DSC in steady state.

Fig. 13.Harmonic amplitude error with MAF in steady state.

Fig. 12 and Fig. 13 illustrate the comparison result of the amplitude error in the steady state. The larger the sampling frequency is and the lower the harmonic order, the smaller the amplitude error becomes. The performance of the MAF based algorithms is generally better than that of the DSC based algorithms under most conditions.

To compare the sensitivity of the DSC/MAF based algorithms to the sampling frequency in the steady state, the corresponding sensitivity indicator K is first defined as:

Obviously, K >1 means that the MAF based algorithm is better than the DSC based algorithm in the steady-state performance in terms of sensitivity to the sampling frequency, and vice versa.

Fig. 14 demonstrates the sensitivity indicator K, which is also the comparison result of the sensitivity to the sampling frequency in the steady state. The numerical calculation result illustrates that K≥1. Therefore, the sensitivity of the MAF to the sampling frequency is generally far weaker than that of the DSC based algorithms. Therefore, the MAF based algorithms should be selected first to achieve thorough harmonic elimination.

Fig. 14.Sensitivity indicator in steady state.

Fig. 15 gives an example which shows the sensitivity with respect to the harmonic order and sampling frequency. The harmonic orders are 3 and 7, and the sampling frequencies are 5 kHz and 2.5 kHz, respectively. The MAF is able to eliminate the harmonics completely in both cases, while results of the DSC contain a certain amount of errors, which will be larger with a higher order and a lower sampling frequency.

Fig. 15.Sensitivity to harmonic order and sampling frequency. (a) Low order and high fs. (b) High order and low fs.

D. Ability of Random Noise Suppression

High-frequency random noise σ(i) agrees with:

To evaluate the ability of the DSC/MAF based algorithms to eliminate random noise in the steady state, (11) and (24) are first rewritten as:

It is evident that the MAF based algorithms are able to average the random noise signal in the whole average window, effectively suppressing the high-frequency random noise. However, the DSC based algorithms have no effect on noise suppression (in some cases noise is amplified). Fig. 16 demonstrates the simulation results of noise suppression with the two methods. The output signal of the MAF is almost zeroed, while severe noise distortion is present with the DSC algorithm.

Fig. 16.Noise suppression with MAF/DSC.

It is evident that compared with the MAF based algorithms, an extra LPF is necessary for eliminating random noise with the DSC based algorithms.

 

VI. EXPERIMENTAL VERIFICATION

Experiments are performed to verify the aforementioned analysis and the proposed algorithms. The sampling frequency is set to be 25 kHz. Since the response time of the CDSC is always half that of the CMAF in eliminating several harmonics, only the experimental results of the CDSC are given in this paper. The signal being sampled stays in the a-b-c frame. Hence, the harmonic order refers to that in the a-b-c frame. In addition, all of the experiments are performed using the open-loop phase synchronization scheme except for Experiment E, in which the closed-loop phase synchronization scheme is utilized.

A. Elimination of a Given Harmonic

The results are the same for the MAF, CMAF, and EMAF when eliminating a given harmonic, since the CMAF and EMAF degenerate to the MAF in this case. Similar results hold true for the DSC based algorithms. Fig. 17 shows the results of eliminating the 3rd harmonic with the MAF and DSC. The transient time is 10 ms and 5 ms, respectively. These results show good agreement with the theoretical analysis. The transient time of the DSC is only half that of the MAF, while the oscillation amplitude is 2.5 times. This results in larger phase oscillations in this case.

Fig. 17.Eliminating the 3rd harmonic via MAF and DSC.

B. Elimination of Several Even Harmonics

Fig. 18 gives the results of eliminating the 2nd and 4th harmonics with the CDSC, EMAF, and EDSC. The response times are 13.3 ms, 20 ms, and 10 ms, respectively. Fig. 19 displays the results of simultaneously eliminating the 2nd, 4th, 6th, and 8th harmonics, and the corresponding transient times are 16.8 ms, 20 ms, and 10 ms, respectively, as expected.

Fig. 18.Elimination of the 2rd and 4th harmonics with (a) CDSC. (b) EMAF. (c) EDSC.

Fig. 19.Elimination of the 2nd, 4th, 6th, and 8th harmonics with (a) CDSC. (b) EMAF. (c) EDSC.

The experimental results indicate that the response times for the EMAF and EDSC are 1 grid cycle and 0.5 cycles, respectively, in eliminating arbitrary numbers of odd harmonics. Phase oscillations are more obvious when the EDSC is utilized. The transient time of the CDSC increases with the number of harmonics to be eliminated. The response time of the EDSC is shorter than that of the CDSC. However, it has greater phase oscillations.

To summarize, the dynamic response speed is almost same for the CDSC and EMAF, and is the fastest for the EDSC. The EMAF is the easiest to implement, and it has the lowest phase oscillations.

C. Elimination of Several Odd Harmonics

Fig. 20 illustrates the results of eliminating the 3rd, 5th, and 7th harmonics with the CDSC, EMAF, and EDSC. The response times are 9.2 ms, 10 ms, and 7.5 ms, respectively.

Fig. 20.Elimination of the 3rd, 5th, and 7th harmonics with (a) CDSC. (b) EMAF. (c) EDSC.

Fig. 21 shows the results of eliminating the 3rd, 5th, 7th, and 9th harmonics, and the response time is 10.4 ms, 10 ms and 8.8 ms, respectively. This is also in agreement with the above analysis. It is evident from the results that only half a grid cycle is required for eliminating all of the odd harmonics with the EMAF. However, the transient times for the CDSC and EDSC increase with the number of odd harmonics to be cancelled. The transient of the EDSC is faster than the CDSC. However, it has larger phase oscillations.

Fig. 21.Elimination of the 3rd, 5th, 7th, and 9th harmonics with (a) CDSC. (b) EMAF. (c) EDSC.

In summary, the CDSC, EMAF and EDSC are comparable in terms of dynamic response speed. Among them the EDSC is slightly faster. The EMAF is the easiest one to carry out with only slight oscillations. Hence it is the most suitable in this case.

D. Elimination of Odd and Even Harmonics

Fig. 22 gives the results for eliminating all of the harmonics within order 8. The transient times for the CDSC, EMAF, and EDSC are 26 ms, 20 ms, and 17.5 ms, respectively. In this case, only one EMAF block is needed, while several blocks of CDSC and EDSC are cascaded when utilizing the DSC based algorithms. It can be seen that the response time increases with the number of harmonics. The response speed of the EDSC is faster than the CDSC, yet the phase oscillation is more severe.

Fig. 22.Elimination of all harmonics within order 8 with (a) CDSC. (b) EMAF. (c) EDSC.

In summary, the response speed is virtually same for the three algorithms. Among them the EDSC is slightly quicker, and the output phase of the EMAF and CDSC are less affected by harmonics. Considering that the EMAF is also the easiest one to realize, it should be the best solution in this case.

E. Performance in Closed-Loop Phase Synchronization

Fig. 23 shows the experimental results for eliminating all of the harmonics within order 4 with the CDSC, EMAF, and EDSC, utilizing the closed-loop phase synchronization scheme. These three algorithms have roughly the same response times, at about 30 ms. The results suggest that the transient time for the CDSC, EMAF, and EDSC are nearly the same in the closed-loop phase synchronization, while the amplitudes of the oscillations are different (see Fig. 24). The oscillation is the most severe in the output q-axis component signal Uq and the phase signal utilizing the EDSC, while the EMAF possesses the smoothest transient.

Fig. 23.Performances of CDSC, EMAF and EDSC under closed-loop control. (a) CDSC. (b) EMAF. (c) EDSC.

Fig. 24.Uq of different schemes in closed-loop control.

Obviously, the dynamic response is in close relation to the applied closed-loop controller. Therefore, it is unlikely to give an empirical expression of the transient time based merely on the type of harmonic elimination scheme. In general, the EMAF is the most suitable due to the fact that it has the lightest effect from harmonics on the output phase. Its suitability is also due to its simplicity in terms of implementation

 

VII. CONCLUSION

The MAF/DSC based harmonic elimination algorithms (CMAF, EMAF, CDSC, and EDSC) have different behaviors in terms of dynamic response speed, steady-state performance, required data storage size, sensitivity to sampling frequency and the ability to eliminating harmonics and noise. Therefore, designers should consider multiple factors simultaneously and select the optimal algorithm to avoid unnecessary computational effort and to achieve the shortest possible response time in a specific application, particularly in the case of the selective cancellation of specific harmonics.

Generally, the DSC based algorithms have a quicker dynamic response speed and have more advantages in terms of design flexibility when dealing with several given harmonics, especially for several odd harmonics. However, the amplitude attenuation is not sufficient for harmonics that are not configured to be eliminated. Therefore, the phase oscillations during the transient are more severe for DSC based algorithms. In the steady state, they are more sensitive to the sampling frequency. In addition, an additional LPF is required to attenuate high-frequency random noise.

The MAF based algorithms are characterized by sufficient attenuation of harmonics/noise and easy implementation. Their harmonic elimination ability is far stronger than that of the DSC based algorithms, especially for systems with a low sampling frequency and for eliminating high-order harmonics. If arbitrary harmonics need to be eliminated, the EMAF and EDSC have the same theoretical response time. However, the EMAF with a one grid cycle window length is much better in terms of digital implementation and comprehensive performance. The dynamic response speeds of the EMAF and EDSC are roughly same in closed-loop phase synchronization systems, while the EMAF is bounded to a smoother output phase and an easier implementation. The experimental results prove the correctness of the analysis.

The conclusions of this study can be utilized for selecting the most suitable harmonic elimination algorithm and for achieving better overall performance. In addition, the improved schemes, EMAF and EDSC, can also be applied for detecting selective harmonics, phase-sequence separation, and power quality improvement.

참고문헌

  1. K.-W. Lao, M.-C. Wong, N. Y. Dai, and C.-K. Wong, “A systematic approach to hybrid railway power conditioner design with harmonic compensation for high-speed railway,” IEEE Trans. Ind. Electron., Vol. 62, No. 2, pp. 930-942, Feb. 2015. https://doi.org/10.1109/TIE.2014.2341577
  2. A. Bechouche, D. O. Abdeslam, T. O. Cherif, and H. Seddiki, “Adaptive neural PLL for grid-connected DFIG synchronization,” Journal of Power Electronics., Vol. 14, No. 13, pp. 608-620, May 2014. https://doi.org/10.6113/JPE.2014.14.3.608
  3. J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, and E. Galvan, “Power-electronic systems for the grid integration of renewable energy sources: a survey,” IEEE Trans. Ind. Electron., Vol. 53, No. 4, pp. 1002-1016, Jun. 2006. https://doi.org/10.1109/TIE.2006.878356
  4. D. Divan, “A new concept for realizing grid power flow control,” IEEE Trans. Power Electron., Vol. 22, No. 4, pp. 2253-2260, Apr. 2007. https://doi.org/10.1109/TPEL.2007.909252
  5. M. K. Ghartemani, B. T. Ooi, and A. Bakhshai, “Application of enhanced phase-locked loop system to the computation of synchrophasors,” IEEE Trans. Power Del., Vol. 26, No. 1, pp. 22-32, Jan. 2011. https://doi.org/10.1109/TPWRD.2010.2064341
  6. J.-P. Lee, B.-D. Min, T.-J. Kim, D.-W. Yoo, and J.-Y. Yoo, “Active frequency with a positive feedback anti-islanding method based on a robust PLL algorithm for grid-connected PV PCS,” Journal of Power Electronics., Vol. 11, No. 3, pp. 360-368, May 2011. https://doi.org/10.6113/JPE.2011.11.3.360
  7. S. Golestan, M. Monfared, F. D. Freijedo, and J. M. Guerrero, “Dynamics assessment of advanced single-phase PLL structures,” IEEE Trans. Ind. Electron., Vol. 60, No. 6, pp. 2167-2177, Jun. 2013. https://doi.org/10.1109/TIE.2012.2193863
  8. L.-Y. Yang, C.-L. Wang, J.-H. Liu, and C-X. Jia, “A novel phase locked loop for grid-connected converters under non-ideal grid conditions,” Journal of Power Electronics., Vol. 15, No. 1, pp. 216-226, Jan. 2015. https://doi.org/10.6113/JPE.2015.15.1.216
  9. H.-J. Choi, S.-H. Song, S.-G. Jeong, J.-Y. Choi, and I. Choy, “Enhanced dynamic response of SRF-PLL system for high dynamic performance during voltage disturbance,” Journal of Power Electronics., Vol. 11, No. 3, pp. 369-374, May 2011. https://doi.org/10.6113/JPE.2011.11.3.369
  10. P. Rodriguez, J. Pou, J. Bergas, and J. I. Candela, “Decoupled double synchronous reference frame PLL for power converters control,” IEEE Trans. Power Electron., Vol. 22, No. 2, pp. 584-592, Mar. 2007. https://doi.org/10.1109/TPEL.2006.890000
  11. F. G. Espłn, E. Figueres, and G. Garcera, “An adaptive synchronous reference frame phase-locked loop for power quality improvement in a polluted utility grid,” IEEE Trans. Ind. Electron., Vol. 59, No. 6, pp. 2718-2731, Jun. 2012. https://doi.org/10.1109/TIE.2011.2166236
  12. B. Singh and S. R. Arya, “Implementation of single-phase enhanced phase-locked loop-based control algorithm for three-phase DSTATCOM,” IEEE Trans. Power Del., Vol. 28, No. 3, pp. 1516-1524, Jul. 2013. https://doi.org/10.1109/TPWRD.2013.2257876
  13. M. K. Ghartemani, “Linear and pseudolinear enhanced phased-pocked loop (EPLL) structures,” IEEE Trans. Ind. Electron., Vol. 61, No. 3, pp. 1464-1474, Mar. 2014. https://doi.org/10.1109/TIE.2013.2261035
  14. F. D. Freijedo, J. D. Gandoy, O. Lopez, and E. Acha, “A generic open-loop algorithm for three-phase grid voltage/current synchronization with particular reference to phase, frequency, and amplitude estimation,” IEEE Trans. Power Electron., Vol. 24, No. 1, pp. 94-107, Jan. 2009. https://doi.org/10.1109/TPEL.2008.2005580
  15. J.-S. Ko, Y.-G. Seo, and H.-S. Kim, “Precision position control of PMSM using neural observer and parameter compensator,” Journal of Power Electronics, Vol. 8, No. 4, pp. 354-362, Jan. 2008.
  16. J. Svensson, M. Bongiorno, and A. Sannino, “Practical implementation of delayed signal cancellation method for phase-sequence separation,” IEEE Trans. Power Del., Vol. 22, No. 1, pp. 18-26, Jan. 2007. https://doi.org/10.1109/TPWRD.2006.881469
  17. M. Bongiorno, J. Svensson, and A. Sannino, “Effect of sampling frequency and harmonics on delay-based phase-sequence estimation method,” IEEE Trans. Power Del., Vol. 23, No. 3, pp. 1664-1672, Jul. 2008. https://doi.org/10.1109/TPWRD.2008.915802
  18. F. A. S. Neves, M. C. Cavalcanti, P. Souza, and F. Bradaschia, “A generalized delayed signal cancellation method for detecting fundamental-frequency positive-sequence three-phase signals,” IEEE Trans. Power Del., Vol. 25, No. 3, pp. 1816-1825, Jul. 2010. https://doi.org/10.1109/TPWRD.2010.2044196
  19. Y. F. Wang and Y. W. Li, “Analysis and digital implementation of cascaded delayed-signal-cancellation PLL,” IEEE Trans. Power Electron., Vol. 26, No. 4, pp. 1067-1080, Apr. 2011. https://doi.org/10.1109/TPEL.2010.2091150
  20. Y. F. Wang and Y. W. Li, “Grid synchronization PLL based on cascaded delayed signal cancellation,” IEEE Trans. Power Electron., Vol. 26, No. 7, pp. 1987-1997, Jul. 2011. https://doi.org/10.1109/TPEL.2010.2099669
  21. Y. F. Wang and Y. W. Li, “Three-phase cascaded delayed signal cancellation PLL for fast selective harmonic detection,” IEEE Trans. Ind. Electron., Vol. 60, No. 4, pp. 1452-1463, Apr. 2013. https://doi.org/10.1109/TIE.2011.2162715
  22. S. Golestan, M. Ramezani, J. M. Guerrero, and M. Monfared, “dq-frame cascaded delayed signal cancellation-based PLL: analysis, design, and comparison with moving average filter-based PLL,” IEEE Trans. Power Electron., Vol. 30, No. 3, pp. 1618-1632, Mar. 2015. https://doi.org/10.1109/TPEL.2014.2315872
  23. M. A. Pérez, J. R. Espinoza, L. A. Morán, and M. A. Torres, “A robust phase-locked loop algorithm to synchronize static-power converters with polluted AC systems,” IEEE Trans. Ind. Electron., Vol. 55, No. 5, pp. 2185-2192, May 2008. https://doi.org/10.1109/TIE.2008.918638
  24. K.- J. Lee, J.-P. Lee, D. Shin, and D.-W. Yoo, “A novel grid synchronization PLL method based on adaptive low-pass notch filter for grid-connected PCS,” IEEE Trans. Ind. Electron., Vol. 61, No. 1, pp. 292-301, Jan. 2014. https://doi.org/10.1109/TIE.2013.2245622
  25. D. Shin, K.-J. Lee, J.-P. Lee, and D.-W. Yoo, “Implementation of fault ride-through techniques of grid-connected inverter for distributed energy resources with adaptive low-pass notch PLL,” IEEE Trans. Power Electron., Vol. 30, No. 5, pp. 2859-2871, May 2015. https://doi.org/10.1109/TPEL.2014.2378792