Journal of KIISE (정보과학회 논문지)

Korean Institute of Information Scientists and Engineers (한국정보과학회)
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FBDtoVHDL: An Automatic Translation from FBD into VHDL for FPGA Development

FBDtoVHDL: FPGA 개발을 위한 FBD에서 VHDL로의 자동 변환

  • 김재엽 (건국대학교 컴퓨터 정보통신공학) ;
  • 김의섭 (건국대학교 컴퓨터 정보통신공학) ;
  • 유준범 (건국대학교 컴퓨터공학부) ;
  • 이영준 (한국원자력연구원 MMIS Lab.) ;
  • 최종균 (한국원자력연구원 MMIS Lab.)
  • Received : 2015.11.12
  • Accepted : 2016.03.11
  • Published : 2016.05.15
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Abstract

The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.

PLC (Programmable Logic Controller)는 원자력 발전소의 디지털 제어시스템의 개발을 위해 널리 사용되어왔지만 복잡성의 증가와 유지보수 비용 등의 문제로 인해 FPGA (Field Programmable Gate Array) 기반 제어시스템이 대안으로 떠오르고 있다. 하지만 PLC 개발자가 FPGA 기반 제어시스템을 개발하기 위해서는 FPGA 개발을 위한 언어를 사용해야 하고 기존의 PLC 개발에서 획득한 노하우 및 지식의 재사용을 어렵게 만든다는 등의 문제가 발생한다. 본 논문에서는 이와 같은 문제를 해결하기 위해서 PLC 소프트웨어 개발을 위한 언어 중 하나인 FBD (Function Block Diagram)를 FPGA 개발을 위한 하드웨어 기술 언어 중 하나인 VHDL로의 자동 변환을 위한 방법과 이를 기반으로 개발한 자동 변환 도구인 FBDtoVHDL을 소개한다. 본 연구에서 소개하는 FBDtoVHDL 도구를 사용하여 FBD를 VHDL로 자동 변환함으로써 PLC 개발자는 하드웨어 기술 언어에 대한 지식이 없이도 FPGA 개발하는 것이 가능하다.

Keywords

Acknowledgement

Grant : FPGA-기반 제어기 통합개발환경을 위한 핵심 소프트웨어 기술 개발, 원자력 계측제어 계통 안전 적합성 평가체계

Supported by : 한국원자력연구원

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