JSTS:Journal of Semiconductor Technology and Science

  • 제16권2호
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  • Pages.172-178
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  • 2016
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  • 1598-1657(pISSN)
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  • 2233-4866(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
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Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

  • Yoon, Young Jun (School of Electronics Engineering, Kyungpook National University) ;
  • Seo, Jae Hwa (School of Electronics Engineering, Kyungpook National University) ;
  • Cho, Seongjae (Department of Electronic Engineering, Gachon University) ;
  • Kwon, Hyuck-In (School of Electrical and Electronics Engineering, Chung-Ang University) ;
  • Lee, Jung-Hee (School of Electronics Engineering, Kyungpook National University) ;
  • Kang, In Man (School of Electronics Engineering, Kyungpook National University)
  • 투고 : 2015.08.25
  • 심사 : 2015.11.27
  • 발행 : 2016.04.30
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초록

In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.

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참고문헌

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