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Process Modeling of Germanium Condensation and Application to Nanowire PMOSFET

게르마늄 응축 공정의 모델링과 나노와이어 PMOSFET 응용

  • Yun, Mina (Department of Electronic Engineering, Gachon University) ;
  • Cho, Seongjae (Department of Electronic Engineering, Gachon University)
  • 윤민아 (가천대학교 전자공학과) ;
  • 조성재 (가천대학교 전자공학과)
  • Received : 2015.11.09
  • Accepted : 2016.03.03
  • Published : 2016.03.25

Abstract

In this paper, prcess modeling of germanium condensation has been performed and a germanium PMOSFET having nanowire channel implented by the condensation process has been designed and characterized by device simulations. Based on the previous experimental results, our modeling results demonstrate that the ratio of germanium concentration at the silicon germanium-silicon dioxide interface ($C_S$) to that in the bulk region ($C_B$) which are obtainable during the germanium condensation is approximately 4.03 and the effective diffusion coefficient ($D_{eff}$) of germanium atom is $3.16nm^2/s$. Furthermore, a germanium nanowire-channel PMOSFET having the ultra-thin germanium channel on the silicon core that can be fabricated by the germanium condensation has been designed and characterized. As the result, it is confirmed that the proposed device having the coaxial nanowire consisting of silicon core and germanium channel might have superior performances over the device with either all-silicon or all-germanium channel.

본 논문에서는 게르마늄 응축 공정을 모델링하고 공정을 적용한 나노와이어 구조의 게르마늄 PMOSFET의 특성을 소자 시뮬레이션을 통하여 확인하였다. 기존의 연구 결과들을 토대로 하여 모델링을 수행한 결과, 게르마늄 응축 공정 과정에서 얻게 되는 벌크 영역에서의 게르마늄 농도($C_B$)에 대한 실리콘 게르마늄-실리콘 산화막 계면에서의 게르마늄 농도의 비율($C_S$)은 약 4.03, 해당 공정 온도에서 게르마늄 원자의 유효 확산 계수($D_{eff}$)은 약 $3.16nm^2/s$으로 추출되었다. 나아가, 게르마늄 응축 공정을 통하여 구현할 수 있는 실리콘 코어 상에 얇은 게르마늄 채널을 갖는 나노와이어 채널 구조의 PMOSFET을 설계하고 성능을 분석하였다. 이를 통하여, 전영역을 실리콘으로 혹은 게르마늄으로 하는 채널을 갖는 소자에 비하여 실리콘 코어-게르마늄 채널의 동축 이종접합 채널을 갖는 소자가 우수한 특성을 가질 수 있음을 확인하였다.

Keywords

References

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