사물인터넷융복합논문지 (Journal of Internet of Things and Convergence)

한국사물인터넷학회 (The Korea Internet of Things Society)
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224비트 ECDSA 하드웨어 시간 시뮬레이션을 위한 테스트벡터 생성기

Test Vector Generator of timing simulation for 224-bit ECDSA hardware

  • Kim, Tae Hun (Security Development & Operation Team, KEPCO KDN Co. Ltd.) ;
  • Jung, Seok Won (Dept. of Information Security Engineering, Mokpo National University)
  • 투고 : 2015.12.09
  • 발행 : 2015.12.30
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초록

하드웨어는 다양한 구조로 개발되고, 모듈들에 대한 시간 시뮬레이션을 할 때 각 클럭 사이클에 사용되는 변수들의 값을 확인할 필요가 있다. 본 논문은 224비트 ECDSA 하드웨어를 개발하면서 하드웨어 모듈의 시간 시뮬레이션을 위한 테스트 벡터를 제공하는 소프트웨어 생성기를 소개한다. 테스트 벡터는 GUI 형태와 텍스트 파일 형태로 제공된다.

Hardware are developed in various architecture. It is necessary to verifying value of variables in modules generated in each clock cycles for timing simulation. In this paper, a test vector generator in software type generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format.

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참고문헌

  1. John A. Stankovic, "Research Directions for the Internet of Things", Internet of Things Jour., IEEE, Vol.1, Issue 1, pp.3-9, 2014. https://doi.org/10.1109/JIOT.2014.2312291
  2. C. Qiang, G. Quan, B. Yu and L. Yang, "Research on Security Issues of the Internet of Things", International Journal of Future Generation Communication and Networking, Vol.6, No.6, pp.1-10, 2013. https://doi.org/10.14257/ijfgcn.2013.6.6.01
  3. J. Nisha, S. Saetang, C. Chen, S. Kutzner, S. Ling and A. Poschmann, "Feasibility and practicability of standardized cryptography on 4-bit micro controllers", In Selected Areas in Cryptography, pp.184-201, 2013.
  4. Z. Liu, H. Seo, J. GroBschadl and H. Kim, "Reverse Product-Scanning Multiplication and Squaring on 8-bit AVR Processors", ICS, LNCS 8958, pp.158-175, 2015.
  5. D. Hong, J.-H. Lee, D.-C. Kim, D. Kwon, K. H. Ryu and D.-G. Lee, "LEA: A 128-bit block cipher for fast encryption on common processors", Information Security Applications, LNCS 8267, pp.3-27, 2014.
  6. Z. Liu, H. Seo, J. GroBschadl and H. Kim, "Efficient Implementation of NIST-Compliant Elliptic Curve Cryptography for Sensor Nodes", ICICS2013, LNCS 8233, pp.302-317, 2013.
  7. S. Kumar, "Elliptic Curve Cryptography for Constrained Devices", A dotorial thesis. 2006.
  8. NIST, "Transitions: Recommendation for Transitioning the Use of Cryptographic Algorithms and Key Lengths", NIST Special Publication 800-131A Rev.1, pp.6-7. 2015.
  9. D. Hankerson, A. Menezes and S. Vanstone, "Guide to Elliptic Curve Cryptography", Springer, 2004.
  10. Certicom Research, "SEC 2: Recommended Elliptic Curve Domain Parameters", SEC 2 (Draft) Ver. 2.0, 2010.
  11. J. S. Coron, "Resistance Against Differential Power Analysis for Elliptic Curve Cryptosystems", CHES'99, LNCS 1717, pp. 292-302, 1999.
  12. M. Joye, "Fast Point Multiplication on Elliptic Curves Without Precomputation", Arithmetic of Finite Fields (WAIFI 2008), LNCS 5130, pp.36-46, 2008.
  13. Y. J. Yoon, S. W. Jung, S. Lee, "Architecture for an Elliptic Curve Scalar Multiplication Resistant to Some Side-Channel Attacks", ICISC2003, LNCS 2971, pp.139-151, 2004.
  14. E. Saas and C. K. Koc, "The Montgomery Modular Inverse - Revisited", IEEE Trans. on Comp., Vol. 49, No. 7, pp.763-766, 2000. https://doi.org/10.1109/12.863048
  15. T. H. Kim and S. W. Jung, "Implementation of a Software Test Bench for Developing Stage of a 224-bit ECDSA Hardware Architecture", ICIoTC2015, pp.108-109, 2015.
  16. NIST, "Security requirments for cryptographic modules", FIPS PUB 140-2, 2002.
  17. NIST, "The FIPS 186-4 Elliptic Curve Digital Signature Algorithm Validation System(ECDSA2VS)", 2014.