Half Load-Cycle Worked Dual Input Single Output DC/AC Inverter

Abstract

A novel half load-cycle worked dual input single output (DISO) DC/AC inverter is presented. The basic circuit consists of a dual buck regulator, which works in continuous current mode. The working principle of DISO DC/AC inverter has been used. The control method applied for half load-cycle worked DISO DC/AC inverter has been studied. The control effects of the open-loop proportional control and closed-loop proportional-integral control are compared by using PSIM software. The parameters are adopted in the realistic simulation and experiment test. Moreover, the waveforms, such as voltage of modulation reference signal and output voltage, were given. The simulation and experiment results proved that the half load-cycle worked DISO DC/AC inverter could achieve good performance, gain a line frequency of 50 Hz, and verify the correctness of theoretical analysis.

I. INTRODUCTION

DC/AC inverter is a static inverter that takes power from a DC voltage source or DC current source as well as delivers power to a load by using power electronic devices. The output variable is a low-distortion AC voltage or AC current of single-phase or multi-phase, which is utilized to meet load power requirements [1]. As a branch of DC/AC inverter, the single-phase full-bridge DC/AC inverter for interfacing with the grid is needed with the increased penetration of distributed power-generation systems, such as small wind power [2], [3]. The conversion mechanism of the traditional single-phase DC/AC inverter is PWM modulation [4]. PWM is a modulation technique that conforms to the width of the pulse, formally the pulse duration, based on modulator signal information. The single-phase DC/AC inverter suffers from high total harmonic distortion (THD) of output voltage waveform, low efficiency, and large size [5]. The single-phase DC/AC inverter has low total harmonic distortion, high efficiency, and a small size. Two methods have been used to increase the operating frequency of the inverters and change the topology of the main circuit.

Hard switching restricts the switching frequency. Hence, abundant efforts have been made to realize several kinds of the soft-switched version of the inverters. A resonant DC link has been introduced, but it encountered problems such as high peak voltage and/or current stress in the switching devices [6]. These problems are solved at the cost of additional complexity in the controller and additional components. The best method is to employ some forms of zero-voltage switching (ZVS) and/or zero-current switching (ZCS) to increase the efficiency and decrease size. The output voltage waveform of conventional single-phase full-bridge inverter is PWM to synthesize PWM signals and high THD [7]-[9].

High operating frequency and/or better circuit is needed to reduce the proportion of harmonic distortion. As a DC/AC inverter, the output voltage should be AC power. In addition, the expected output voltage is sinusoidal. A single-phase full-bridge inverter through controlled capacitor charging is proposed, which also suffers from low operating frequency [10]. The output voltage of the buck regulator varies linearly with the duty cycle for a given input voltage and ZCS technology has been applied to the buck regulator successfully [11]–[15]. This paper presents a novel half load-cycle worked DISO DC/AC inverter, which is composed of positive and negative buck regulators. The output voltage waveform is close to sinusoidal, which can work with ZCS and/or ZVS easily. The inverter is verified by simulation technology with the use of PSIM software. The experiment is tested first. Moreover, the commonly used control strategy is studied.

 

II. MAIN CIRCUIT TOPOLOGY AND BASIC WORKING PRINCIPLE

The DC/AC transform circuit is composed of the positive and negative buck regulators [16]. Figure 1 shows the schematic of the buck regulator.

Fig. 1.Schematic of buck regulator.

Switch S is switched hard on and hard off in series with the DC input voltage E to produce a rectangular voltage at the anode side of the diode D. In the buck regulator, the on period of the power device (Ton) is adjusted to maintain regulation, while the total cycle period (T) is fixed. Hence, the frequency is fixed at 1/T.

When switch S is on, a current builds up in the series inductor L that flows toward the output. The current transfers energy from E to the output capacitor and load. The output voltage Uo (Uo is the average output voltage) is less than E. Hence, the inductor L will impress a voltage across uL=E-Uo. Current rises linearly with a constant voltage across the inductor. Inductive energy also rises. When switch S is off, inductive energy releases through the free-wheeling diode D. In addition, the current in the inductor decreases linearly with uL=-Uo. In the on switching period, the net change of the inductor current is zero. This change is proportional to the integral of the inductor voltage over the interval. Therefore, the integral of the inductor voltage must be zero in steady state, which is the principle of inductor volt-second balance. Assuming the off period of the power device is Toff, Ton+Toff=T, Equation (1) will be obtained.

The relationship of the input and output voltage of buck regulators is shown in Equation (2).

D is called the duty ratio, which can be controlled electronically in a range of 0–1. Generally, the output voltage is smaller than the input voltage.

When the switch S is on, the current through the inductor L is IL1. Equation (3) will be obtained.

Assuming that the initial value of the current through the inductor L is IL10, then Equation (4) will be obtained.

When the switch S is off, the current through the inductor L is IL2. Equation (5) will then be obtained.

Assuming that the initial value of the current through the inductor L is IL20, then Equation (6) will be obtained.

and

According to the law of conservation of energy, the power supplied to the load is equal to the load consumption during a cycle period, as shown in Equation (8).

Therefore, IL10 can be written as Equation (9).

and

IL20 can be written as Equation (11).

and

The current through the inductor L ripple is as follows:

When the buck regulator works on the CCM/DCM boundary, Equation (14) is needed.

Boundary value of L, D can be obtained as Equation (15).

When K = 1- D < , the buck regulator works on CCM.

When K = 1- D > , the buck regulator works on DCM.

When the buck regulator works in CCM, the output voltage is proportional to the duty cycle D. To ensure that the output voltage of buck regulator is a sinusoidal voltage, the only thing needed is to control the duty cycle D according to SPWM law. Hence, the duty cycle D will vary according to the sine rule. The positive buck regulator must be used in conjunction with the negative buck regulator because of the unidirectional output voltage of the buck regulator.

The main circuit topology of the DC/AC inverter is shown in Fig. 2. The DC/AC inverter is composed of the positive and negative buck regulators. The positive buck regulator is used to provide the positive half cycle of the output. The negative buck regulator is used to generate the negative half cycle of the output. Hence, only one set of buck regulator is at work any time.

Fig. 2.Main circuit topology of DC/AC inverter.

 

III. ANALYSIS OF WORKING PRINCIPLE

Fig. 3 shows the working quadrant of the DC/AC inverter.

Fig. 3.Working quadrant of DC/AC inverter.

In the first quadrant, the positive buck regulator works, while the negative buck regulator does not work. uo˃0, io˃0. Unidirectional switch S1 is controlled according to SPWM mode. Switch S2 is still on. Control signals of switches S2 and S4 are complementary. Switches S3 and S4 are off. Two operating modes are found.

Mode1: Fig. 4(a) shows that unidirectional switch S1 is on. The current that flows through inductor L1 ramps up linearly and switch S2 is still on. The positive buck regulator supplies the output capacitor C1 and load.

Fig. 4.Schematic of the first quadrant.

Mode 2: Fig. 4(b) shows that the unidirectional switch S1 is off. The current that flows through inductor L1 decreases linearly and switch S2 is still on. The output capacitor C1 supplies the load.

In the second quadrant, the positive buck regulator works while the negative buck regulator does not work. uo˃0, io˂0. The anti-parallel diode D2 of switch S2 works. The load current is freewheeling. Two operating modes are found. A schematic of the second quadrant is shown in Fig. 5.

Fig. 5.Schematic of the second quadrant.

Fig. 5(a) shows that when switch S1 is on, the anti-parallel diode D2 of switch S2 is working. Fig. 5(b) shows that when switch S1 is off, the anti-parallel diode D2 of switch S2 is also working.

In the third quadrant, the negative buck regulator works while the positive buck regulator does not work. uo˂0, io˂0. Unidirectional switch S3 is controlled according to SPWM mode. Switch S4 is still on, and switches S1 and S2 are off. Two operating modes are found.

Mode 3: Fig. 6(a) shows that unidirectional switch S3 is on. The current that flows through inductor L2 ramps up linearly and switch S4 is still on. The negative buck regulator supplies for the output capacitor C2 and load.

Fig. 6.Schematic of the third quadrant.

Mode 4: Fig. 6(b) shows that unidirectional switch S3 is off.

The current that flows through inductor L2 decreases linearly and switch S4 is still on. The output capacitor C2 supplies the load.

In the fourth quadrant, the negative buck regulator works while the positive buck regulator does not work. uo˂0, io˃0. The anti-parallel diode D4 of switch S4 works while the load current is freewheeling. Two operating modes are also found. A schematic diagram of the fourth quadrant is shown in Fig. 7. Fig. 7(a) shows that when switch S3 is on, the anti-parallel diode D4 of switch S4 is working. Fig. 7(b) shows that when switch S3 is off, the anti-parallel diode D4 of switch S4 is also working.

Fig. 7.Schematic of the fourth quadrant.

 

IV. SELECTION AND IMPLEMENTATION OF THE SYSTEM CONTROL STRATEGY

In the most straightforward implementation of achieving high quality sinusoidal output, the desired sinusoidal output voltage is generated by comparing the desired sinusoidal reference waveform with a high-frequency triangular ‘carrier’ wave, which is the so-called SPWM control. The advantages of SPWM control are its fixed operating frequency and easily filtered harmonic signal. The positive half cycle and negative half cycle of the sine wave are realized by the positive and negative buck regulators, respectively. The voltage open-loop proportional-differential control can be accepted under the condition that the sinusoidal waveform quality requirements are not extremely high. In this manner, the quality of the sinusoidal output voltage can be ensured. However, the amplitude of the output voltage is controlled by the input voltage. If high quality sinusoidal output is needed, then voltage closed-loop proportional-integral control will be used. The amplitude of the output voltage will not be affected by the variation of the input voltage.

The system control diagram of open-loop P control is shown in Fig. 8(a), which is composed of the control signal generating circuit and pulse distribution circuit.

Fig. 8.System control diagram.

The system control diagram of closed-loop PI control is shown in Fig. 8(b), which is composed of the comparison calculation circuit and control signal generating circuit with the pulse distribution circuit.

When the unipolar SPWM modulation is used, limiting the value of the modulation ratio D is necessary to ensure that the positive and negative buck regulators can work in CCM. If the buck regulator works in the DCM mode, then the output voltage waveform will not be the perfect sinusoidal waveform.

 

V. ANALYSIS OF THE SIMULATION RESULTS

PSIM simulation software is used to verify the theoretical analysis above. The parameter values of DC/AC inverter used are listed below. Frequency of triangular carrier is 15.36 kHz. Frequency of sinusoidal reference waveform is 50 Hz, L1=L2=1 mH. C1=C2=22 μF, load resistor R=6Ω, and load inductance L=0.2 mH.

Fig. 9(a) shows the driving signal of S1–S4 with the PSIM. The special half load-cycle control mode is needed to obtain AC output, and S1–S4 must work in combination mode. Fig. 9(b) shows the waveform of load current io, source current iE1, and driving signal of S1. Fig. 9(c) shows a zoomed portion of Fig. 9(b).

Fig. 9.Driving signal of V1–V4 with the PSIM.

Fig. 10 shows the simulation result of the open-loop P control implementation. The waveforms of sine wave “vref” and output voltage with the given reference is shown. The input voltage of Fig. 10(a) is 80 V. The input voltage of Fig. 10(b) is 120 V. Fig. 11 shows the simulation result of the closed-loop PI control implementation as well as the waveforms of the given reference sine wave. The output voltage is also shown. The input voltage of Figs. 11(a) and 11(b) is 80 and 120 V, respectively. The output voltage could follow the given reference sine wave well. The output voltage with the open-loop P control is affected by the input voltage. However, the output voltage with the closed-loop PI control is constant and unaffected by the input voltage.

Fig. 10.Simulation result of the open-loop P control.

Fig. 11.Simulation result of the closed-loop PI control.

Briefly, the control signal of the inverter with open-loop P control is SPWM, which derives Equation (2). In addition, the control signal of the inverter with closed-loop PI control is PWM and not SPWM. When the voltages of capacitors C1 and C2 are controlled by the closed-loop PI voltage control, the system has a stronger anti-interference ability on the input side of the DC voltage disturbances compared with the case in which it is controlled by the open-loop P control. Switches S1 and S3 can be adjusted dynamically by adjusting the duty cycle of the drive signal. Hence, the positive and negative output voltages will return to their normal values to overcome the input DC voltage disturbances.

 

VI. ANALYSIS OF THE EXPERIMENT RESULTS

The dsPIC30F4011 microcontroller is used to develop an experimental prototype with a positive and negative buck regulators for photovoltaic power generation to verify the theoretical analysis and practical results. The parameter values of experiment prototype are as follows: the frequency of the triangular carrier is 15.36 kHz, the frequency of the sinusoidal reference waveform is 50 Hz, L1=L2=1 mH, C1=C2=22 μF, load resistor R=6Ω, and load inductance L=0.2 mH.

MOSFET IRF740 and fast recovery diode MUR8100E series combination are used as unidirectional switches S1 and S3 to meet the input voltage of 100 V. Switches S2 and S4 use MOSFET IRF740.

Experiment waveforms are shown in Figs. 12, 13, and 14. Fig. 12 shows the control pulses of switches S1–S4. Switches S2 and S4 are controlled by the complementary control signals V2 and V4 to achieve the operation of the positive buck regulator and the negative buck regulator, respectively. Fig. 13 is the experiment waveform of the output sinusoidal voltage and the given reference sinusoidal signal waveform. Fig. 14 is the experiment waveform of the output sinusoidal voltage and the load current waveform. Load inductance of Fig. 14(a) is 0.2 mH. Load inductance of Fig. 14(b) is 1 mH. The experimental waveforms of the output voltage are evidently consistent with the previous simulation results. The harmonic component of the output voltage uo in Fig. 14(b) is shown as Fig. 14(c). All experiment results verify that the output voltage can track the given signal dynamically. Moreover, the freewheeling effect of the load current is good.

Fig. 12.Experiment control pulses of switches S1–S4.

Fig. 13.Waveform of the output voltage and given reference signal.

Fig. 14.Waveform of the output voltage and load current.

 

VII. CONCLUSIONS

A novel half load-cycle worked DISO DC/AC inverter is presented based on the relationship between the input and output voltage of the buck regulator in continuous conduction mode (CCM). CCM is composed of a dual buck regulator, namely, positive buck regulator and negative buck regulator. The dual buck regulator works in half-cycle control and its output terminal works in anti-parallel mode. CCM features a dual power supply, single power output, and voltage step-down output. The simulation of the DC/AC inverter was presented through PSIM. The experiment is conducted on the experimental prototype. The simulation and experiment results verified the correctness of the analytical theory of DC/AC inverter and feasibility of the novel inverter. The DC/AC inverter can track the input sinusoidal in real time.