DOI QR코드

DOI QR Code

Experimental Verification of Heat Sink for FPGA Thermal Control

FPGA 열제어용 히트싱크 효과의 실험적 검증

  • Received : 2014.06.27
  • Accepted : 2014.08.07
  • Published : 2014.09.01

Abstract

The FPGA is used to the high speed digital satellite communication on the Digital Signal Process Unit of the next generation GEO communication satellite. The high capacity FPGA has the high power dissipation and it is difficult to satisfy the derating requirement of temperature. This matter is the major factor to degrade the equipment life and reliability. The thermal control at the equipment level has been worked through thermal conduction in the space environment. The FPGA of CCGA or BGA package type was mounted on printed circuit board, but the PCB has low efficient to the thermal control. For the FPGA heat dissipation, the heat sink was applied between part lid and housing of equipment and the performance of heat sink was confirmed via thermal vacuum test under the condition of space qualification level. The FPGA of high power dissipation has been difficult to apply for space application, but FPGA with heat sink could be used to space application with the derating temperature margin.

정지궤도급 차세대 통신위성에 탑재될 디지털신호처리기에는 디지털 고속통신을 위한 FPGA가 사용된다. 적용된 FPGA는 높은 열소산량을 가지고 있으며, 이로 인한 접합온도의 상승은 부하경감 요구조건을 만족하기 어렵고 장비의 수명과 신뢰도 저하의 주요 원인이다. 지상과는 달리 우주환경에서의 전장품의 열제어는 대부분 열전도를 통하여 이루어지고 있다. CCGA 또는 BGA 형태의 FPGA는 인쇄회로기판에 장착되지만, 인쇄회로기판의 열전도율은 FPGA의 열제어에 효율적이지 못하다. FPGA의 열제어를 위하여 부품 리드와 하우징을 직접 연결하는 히트싱크를 제작하였으며, 우주인증레벨의 열진공시험을 통하여 그 성능을 확인하였다. 높은 전력소모량을 가진 FPGA는 우주환경에 적용하기 어려웠으나, 히트싱크를 적용함으로써 부하경감 온도 마진을 확보하였다.

Keywords

References

  1. Jin-Han Park, Hyeon-Seok Seo, Yeoung-Keun Jang, "A Study on Heat Load Mitigation for High Power Dissipation Equipment of KOMPSAT-2", KSAS Journal, No. 30, Vol. 3, pp. 77-88, 2002.
  2. Michael Pecht, Handbook of Electronic Package Design, Marcel Dekker, Inc., New York, 1991.
  3. Min-Young Kang, Jin-Han Park, Yeoung-Keun Jang, Hwa-Seok Oh "A Study on Thermal Modeling Method of Satellite Equipment", KSAS Journal, No. 29, Vol. 7, pp. 127-136, 2001.
  4. Frank P. Incropera, David P. DeWitt, Fundamentals of Heat and Mass Transfer, John Wiley and sons, 1996
  5. UG520, Virtex-5QV FPGA Packaging and Pinout Specification, Xilinx Inc.
  6. ECSS-Q-ST-30-11, Derating-EEE components, ESA Requirements and Standards Division
  7. Technical Data & Information of DIS-APASTE 2310-PMF, Aptek Laboratories, Inc.