Journal of the Korea Institute of Information and Communication Engineering (한국정보통신학회논문지)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
권호 표지
DOI QR코드

DOI QR Code

Differential CORDIC-based High-speed Phase Calculator for 3D Depth Image Extraction from TOF Sensor

TOF 센서용 3차원 깊이 영상 추출을 위한 차동 CORDIC 기반 고속 위상 연산기

  • Koo, Jung-Youn (School of Electronic Engineering, Kumoh National Institute of Technology) ;
  • Shin, Kyung-Wook (School of Electronic Engineering, Kumoh National Institute of Technology)
  • Received : 2013.11.28
  • Accepted : 2013.12.31
  • Published : 2014.03.31
Download PDF
⟨ Previous Next ⟩

Abstract

A hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is described. The designed phase calculator adopts redundant binary number systems and a pipelined architecture to improve throughput and speed. It performs arctangent operation using vectoring mode of DCORDIC(Differential COordinate Rotation DIgital Computer) algorithm. Fixed-point MATLAB simulations are carried out to determine the optimal bit-widths and number of iteration. The phase calculator has ben verified by FPGA-in-the-loop verification using MATLAB/Simulink. A test chip has been fabricated using a TSMC $0.18-{\mu}m$ CMOS process, and test results show that the chip functions correctly. It has 82,000 gates and the estimated throughput is 400 MS/s at 400Mhz@1.8V.

TOF(Time-Of-Flight) 센서에 의해 획득된 정보로부터 3차원 깊이 영상(depth image)을 추출하기 위한 위상 연산기 하드웨어를 구현한다. 설계된 위상 연산기는 DCORDIC(Differential COordinate Rotation DIgital Computer) 알고리듬의 벡터링 모드를 이용하여 아크탄젠트 연산을 수행하며, 처리량과 속도를 늘리기 위해 잉여 이진 수체계와 파이프라인 구조를 적용하였다. 고정 소수점 MATLAB 시뮬레이션을 통해 검증하고 최적 데이터 비트 수 및 반복 횟수를 결정하였으며, MATLAB/Simulink와 FPGA 연동을 통해 하드웨어 동작을 검증하였다. TSMC $0.18-{\mu}m$ CMOS 공정으로 테스트 칩을 제작하였으며, 테스트 결과 정상 동작함을 확인하였다. 약 82,000 게이트로 구현되었고, 400MHz@1.8V로 동작하여 400 MS/s의 연산 성능을 갖는 것으로 평가되었다.

Keywords

References

  1. S. Hussmann, T. Ringbeck, and B. Hagebeuker, "A performance review of 3D TOF vision systems in comparison to stereo vision systems," in Stereo Vision. Vienna, Austria: I-Tech Edu. Publ., ch. 7, pp. 103-120, 2008.
  2. Y.S. Ho, "3D realistic broadcasting content generation using multi-view camera and depth camera," The journal of Korea Institute of Electronics Engineers, v.38 no.2, pp. 44-49, 2011.
  3. Jongenelen, A.P.P., "Development of a Compact, Configurable, Real-time Range Imaging System," Ph.D dissertation. School of Eng. Victoria University of Wellington, 2010.
  4. S. Hussmann, T. Edeler, "Pseudo 4-phase shift algorithm for performance enhancement of 3D-TOF vision systems," IEEE Trans. Instrum. Meas., vol. 59, no. 5, pp. 1175-1181, May 2010. https://doi.org/10.1109/TIM.2010.2040881
  5. S.B. Gokturk, H. Yalcin, and C. Bamji, "A time-of-flight depth sensor, system description, issues and solutions," in Proc. IEEE Conf. Computer Vision and Pattern Recognition, Washington, DC, 2004.
  6. Herbert Dawid, Heinrich Meyr, "The Differential CORDIC Algorithm : Constant Scale Factor Redundant Implementation without Correcting Iterations" Computers, IEEE Transactions, vol.45, Issue 3, 1996.
  7. R. Gutierrez, V. Torres, J. Valls, "FPGA-imple- mentation of atan(Y/X) based on logarithmic transformation and LUT-based techniques," Journal of Systems Architecture, volume 56. issue 11, pp. 588-596, 2010. https://doi.org/10.1016/j.sysarc.2010.07.013
  8. M. Saber, Y. Jitsumatsu, T. Kohda, "A low-power implementation of arctangent function for communication application using FPGA," Fourth International Workshop on Signal Design and its Applications in Communications (IWSDA'09), pp. 60-63, 2009.
  9. J. E. Volder, "The CORDIC trigonometric computing technique," IRE Transactions on Electronic Computing, vol. EC-8, no. 3, pp. 330-334, 1959. https://doi.org/10.1109/TEC.1959.5222693
  10. B.Lakshmi and A.S. Dhar, "CORDIC Architectures: A Survey," in Hindawi Publishing Corporation, VLSI Design, Volume 2010, Article ID 794891, 19 pages, 2010.
  11. Raphael A. Camponogara Viera, Paulo Cesar C. de Aguirre, Leonardo Londero de Oliveira and Joao Baptista Martins, "Iterative Mode Hardware Implementation of CORDIC Algorithm," in Proceeding of the 26th South Symposium on Microelectronics (SIM 2011), 2011.
  12. D.-M. Ross, S. Miller, M. Sima, and C. Crawford, "Design Rules for Implementing CORDIC on FPGAs," in Proceedings of the 13th IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (Pac Rim 2011). Victoria, B.C., Canada, pp. 797-802, 2011.
  13. Jung-youn Koo, Kyung-Wook Shin, "A Design of Highspeed Phase Calculator for 3D Depth Image Extraction from TOF Sensor Data" Journal of the Korea Institute of Information and Communication Engineering, v.17 no.2, pp. 355-362, 2013. https://doi.org/10.6109/jkiice.2013.17.2.355