Korean Journal of Metals and Materials (대한금속재료학회지)

The Korean Institute of Metals and Materials (대한금속재료학회)
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Effective Cu Filling Method to TSV for 3-dimensional Si Chip Stacking

3차원 Si칩 실장을 위한 효과적인 Cu 충전 방법

  • Hong, Sung Chul (Dept. of Materials Sci. and Eng., University of Seoul) ;
  • Jung, Do Hyun (Dept. of Materials Sci. and Eng., University of Seoul) ;
  • Jung, Jae Pil (Dept. of Materials Sci. and Eng., University of Seoul) ;
  • Kim, Wonjoong (Dept. of Materials Sci. and Eng., University of Seoul)
  • 홍성철 (서울시립대학교 신소재공학과) ;
  • 정도현 (서울시립대학교 신소재공학과) ;
  • 정재필 (서울시립대학교 신소재공학과) ;
  • 김원중 (서울시립대학교 신소재공학과)
  • Received : 2011.08.11
  • Published : 2012.02.25
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Abstract

The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and $60{\mu}m$, respectively. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of $-5.85mA/cm^2$, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

Keywords

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