JSTS:Journal of Semiconductor Technology and Science

  • 제11권1호
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  • Pages.51-58
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  • 2011
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  • 1598-1657(pISSN)
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  • 2233-4866(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
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Fast Generation of Multiple Custom Instructions under Area Constraints

  • Wu, Di (School of EECS, Seoul National University) ;
  • Lee, Im-Yong (School of EECS, Seoul National University) ;
  • Ahn, Jun-Whan (School of EECS, Seoul National University) ;
  • Choi, Ki-Young (School of EECS, Seoul National University)
  • 투고 : 2010.11.30
  • 심사 : 2010.12.23
  • 발행 : 2011.03.31
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초록

Extensible processors provide an efficient mechanism to boost the performance of the whole system without losing much flexibility. However, due to the intense demand of low cost and power consumption, customizing an embedded system has been more difficult than ever. In this paper, we present a framework for custom instruction generation considering both area constraints and resource sharing. We also present how we can speed up the process through pruning and library-based design space exploration.

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참고문헌

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피인용 문헌

  1. Hierarchical Multiplexing Interconnection Structure for Fault-Tolerant Reconfigurable Chip Multiprocessor vol.11, pp.4, 2011, https://doi.org/10.5573/JSTS.2011.11.4.318