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A Built-In Redundancy Analysis with a Minimized Binary Search Tree

  • Cho, Hyung-Jun (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Woo-Heon (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Sung-Ho (Department of Electrical and Electronic Engineering, Yonsei University)
  • Received : 2010.01.29
  • Accepted : 2010.04.05
  • Published : 2010.08.30

Abstract

With the growth of memory capacity and density, memory testing and repair with the goal of yield improvement have become more important. Therefore, the development of high efficiency redundancy analysis algorithms is essential to improve yield rate. In this letter, we propose an improved built-in redundancy analysis (BIRA) algorithm with a minimized binary search tree made by simple calculations. The tree is constructed until finding a solution from the most probable branch. This greatly reduces the search spaces for a solution. The proposed BIRA algorithm results in 100% repair efficiency and fast redundancy analysis.

Keywords

References

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  2. T. Kawagoe et al., "A Built-in Self-Repair Analyzer (CRESTA) for Embedded DRAMs," Proc. Int. Test Conf. (ITC), 2000, pp. 567-574.
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