대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

간단한 위상 보간기 기반의 스프레드 스펙트럼 클락 발생 기술

A Simple Phase Interpolator based Spread Spectrum Clock Generator Technique

  • 이경록 (홍익대학교 대학원 전자정보통신공학과) ;
  • 유재희 (홍익대학교 전자전기공학부) ;
  • 김종선 (홍익대학교 전자전기공학부)
  • Lee, Kyoung-Rok (School of Electronics and Electrical Engineering, Hongik University) ;
  • You, Jae-Hee (School of Electronics and Electrical Engineering, Hongik University) ;
  • Kim, Jong-Sun (School of Electronics and Electrical Engineering, Hongik University)
  • 투고 : 2010.08.03
  • 심사 : 2010.10.06
  • 발행 : 2010.10.25
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

본 논문에서는 전자기파 장애(EMI)의 감소를 위한 위상 보간기 기반의 새로운 스프레드 스펙트럼 클락 발생기(SSCG)를 제시한다. 제안하는 SSCG는 낮은 설계 복잡도와 저전력 및 작은 칩면적을 갖으며 삼각 주파수 변조를 이루기 위해 디지털적으로 조절 가능한 위상 보간 방식을 사용하였다. 이 새로운 SSCG는 듀티 싸이클 왜곡 없이 200MHz에서 ${\pm}2%$의 센터-스프레드 스펙트럼 범위를 갖는 시스템 클락을 발생시킬 수 있다. 이 위상 보간기 기반의 SSCG 회로는 200MHz에서 약 5.0 mW의 전력을 소모하고, 0.18-um 1.8-V CMOS 공정을 사용하여 설계하여 검증하였으며 $0.092mm^2$의 칩 면적을 차지한다.

A compact phase interpolator (PI) based spread spectrum clock generator (SSCG) for electromagnetic interference (EMI) reduction is presented. The proposed SSCG utilizes a digitally controlled phase interpolation technique to achieve triangular frequency modulation with less design complexity and small power and area overhead. The novel SSCG can generate the system clock with a programmable center-spread spectrum range of up to +/- 2 % at 200 MHz, while maintaining the clock duty cycle ratio without distortions. The PI-based SSCG has been designed and evaluated in 0.18-um 1.8-V CMOS technology, which consumes about 5.0 mW at 200MHz and occupies a chip size of $0.092mm^2$ including a DLL.

키워드

참고문헌

  1. K. Hardin. J. Fesrler. and D. Bush, "Spread spectrum clock generation for the reduction of radiated emissions," IEEE International Symposium on Electromagnetic Compatibility, pp. 227-241, 1994.
  2. M. Kim, D. Kim, B. Koo, Y. Kim, O. Choi, N. Kim, "Chip level techniques for EMI reduction in LCD panels," International Zurich Symposium on Electromagnetic Compatibility, pp. 441-444, 2009.
  3. J. Ko, S. Lee, D. Kim, K. Kim, K. Chang, "Spread spectrum clock generator for reducing electro-magnetic interference (EMI) noise in LCD driver IC," Midwest Symposium on Circuits and Systems, pp. 1106-1109, 2007.
  4. S. Ho and H. Huang, "A wideband programmable spread-spectrum clock generator," IEEE Asian Solid-State Circuits Conference, pp. 521-524, 2005.
  5. H. Chang, I. Hua, and S. Liu, "A spread-spectrum clock generator with triangular modulation, " IEEE J. Solid-State Circuits, Vol. 38, No. 4, pp. 673-676, April 2003. https://doi.org/10.1109/JSSC.2003.809521
  6. H. Chen and J. Wu, "A spread-spectrum clock generator for EMI reduction," IEICE Trans. Electron., pp. 1959-1966, Dec. 2001.
  7. J. Kim, D. Kam, P. Jun, and J. Kim, "Spread spectrum clock generator with delay cell array to reduce electromagnetic interference, " IEEE J. Transactions on electromagnetic compatibility, Vol. 47, No. 4, pp. 908-920, Nov., 2005. https://doi.org/10.1109/TEMC.2005.859063
  8. D. De Caro, C. A. Romani, N. Petra, A. Strollo, C. Parrella, "A 1.27 GHz, all-digital spreadspectrum clock generator/synthesizer in 65 nm CMOS," IEEE J. Solid-State Circuits, Vol. 45, No. 5, pp. 1048-1060, May 2010. https://doi.org/10.1109/JSSC.2010.2043461
  9. Application Note 3503: "clock generation with spread spectrum," www.maxim-ic.com/an3503