Design of A Sequence Switch Coding Circuit Without Using Auxiliary Lines

보조선을 사용하지 않은 Sequence Switch Coding 회로의 설계

  • 윤명철 (단국대학교 전자공학과)
  • Published : 2009.11.25

Abstract

The transition of auxiliary lines for transmitting coding information has been one of the major obstacles to restricting the scalability of Sequence Switch Coding (SSC) algorithms. A new design of SSC which does not use auxiliary lines is presented in this paper. The new design makes overhead transitions far less than the previous designs that use auxiliary lines. By applying the new technique, more than 50% of overhead transitions have been reduced, leading to the increase of 30% of the overall efficiency of SSC algorithm.

코딩정보의 전송을 위하여 보조선에서 발생하는 오버헤드전이는 Sequence Switching Code (SSC) 알고리즘의 확장성을 제한하는 가장 큰 걸림돌이 되어왔다. 본 논문에서는 보조선을 사용하지 않고 SSC 회로를 구현하는 방법과 함께 이 방법을 사용하여 보조선을 사용하였을 때 보다 오버헤드전이를 적게 발생시키는 방법을 제시하였다. 실험결과 새로운 방법을 적용함으로써 보조선을 사용하는 방식에 비하여 오버헤드전이의 발생을 50% 이하로 줄이고 알고리즘의 효율을 약 30% 향상시킬 수 있었다.

Keywords

References

  1. Y. Nakagome, K, !toh, M. Isoda, K, Takeuchi, and M. Aoki, "Sub-1-V Swing Internal Bus Architecture for Future Low-Power ULSI's," IEEE Journal of Solid State Circuits, vol. 28, no.4, pp. 414-419, Apr. 1993 https://doi.org/10.1109/4.210023
  2. H. Zhang, V. George, and J. M. Rabaey, "Low swing on-chip signaling techniques: effectiveness and robustness," IEEE Trans. VLSI Syst. vol. 8, no. 3 pp. 264-272, June 2000 https://doi.org/10.1109/92.845893
  3. C. L. Su, C. Y. Tsui, and A. M. Despain, "Low power architecture design and compilation technique for high-performance processors," in Proc. IEEE COMPCON, Feb. 1994, pp. 209214
  4. L. Benini, G. De Micheli, E. Macii, D. Sciuto, and C Silvano, "Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems,"in Proc. Great Lakes Sysmp. VLSI, Mar. 1997, pp. 7782
  5. L. Benini, G. De Micheli, E. Macii, M. Poncino, and S. Quer, "System-level power optimization of special purpose applications: the beach solution," in Proc. Int. Symp. Low Power Electronics Design, pp. 24 - 29, Aug. 1997
  6. M. R. Stan and W. P. Burleson, "Bus-invert coding for low-power Va," IEEE Trans. VLSI Syst., vol. 3, pp. 4958, Mar. 1995
  7. M. Y oon, "Sequence-Switch Coding for LowPower Data Transmission", IEEE Trans. VLSI Syst., vol. 12, pp. 1381-1385, Dec. 2004 https://doi.org/10.1109/TVLSI.2004.837995
  8. 윤명철, '패킷형 데이터를 위한 저전력 전송방법,' 전자공학회논문지, 제41권 SD편, 제7호, 71-79쪽, 2004년 7월
  9. M. Yoon and B. Roh, "A Novel Low-Power Bus Design for Bus-Invert Coding," IEICE Trans. Electronics, vol. E90-C, no. 4, pp. 731-734, 2007 https://doi.org/10.1093/ietele/e90-c.4.731
  10. T. H. Cormen, C. E. Leiserson, and R. L. Rivest, Introduction to Algorithms, New York, McGraw-Hill Book Company, 1992