The Design of carry increment Adder Fixed Fan-out

팬 아웃이 고정된 carry increment 덧셈기 설계 방법

  • Kim, Yong-Eun (Div. of Electronic & Information Engineering, Chonbuk University) ;
  • Chung, Jin-Gyun (Div. of Electronic & Information Engineering, Chonbuk University)
  • 김용은 (전북대학교 전자정보공학부) ;
  • 정진균 (전북대학교 전자정보공학부)
  • Published : 2008.02.25

Abstract

According to increment of stage, the speed of changeable stage Carry-increment adder can be close to $O(\sqrt{2n})$ because the word length which is computed in stage can be lengthened by 1 bit. But the number of stage bits is increased, fan-out of carry which is inputted in stage is increased. So tile speed can be slow. This paper presents a new carry-increment adder design method to fix the number of fan-outs regardless of the number of stages. By layout simulation of 37-bit adder, the area can be Increased up to 40%, but speed improvement up to 75% can be achieved, by the proposed method, compared with a conventional method.

가변 stage carry increment adder는 stage가 증가함에 따라 stage에서 계산되는 워드길이를 1비트씩 늘려줄 수 있으므로 속도는 $O(\sqrt{2n})$에 근접한다. 하지만 stage의 비트가 늘어남에 따라 stage에 입력되는 캐리의 팬 아웃이 증가하게 되고 이로 인하여 속도가 느려진다. 본 논문에서는 stage의 입력 비트를 증가하여도 팬 아웃이 stage에 관계없이 고정될 수 있는 알고리즘을 제안하고 37비트 덧셈기를 레이아웃하여 시뮬레이션 결과를 비교하였을 때 면적은 40% 늘어나는 것에 비해 덧셈기의 속도가 75% 향상되었다.

Keywords

References

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