대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

모바일 멀티미디어의 효율적 처리를 위한 재구성형 병렬 프로세서의 구조

A Reconfigurable Parallel Processor for Efficient Processing of Mobile Multimedia

  • 유세훈 (서울시립대학교 전자전기컴퓨터공학부) ;
  • 김기철 (서울시립대학교 전자전기컴퓨터공학부) ;
  • 양일석 (한국전자통신연구원 U-단말 연구팀) ;
  • 노태문 (한국전자통신연구원 U-단말 연구팀)
  • Yoo, Se-Hoon (School of Electrical and Computer Engineering, University of Seoul) ;
  • Kim, Ki-Chul (School of Electrical and Computer Engineering, University of Seoul) ;
  • Yang, Yil-Suk (U-Terminal Research Team, Electronics and Telecommunications Research Institute) ;
  • Roh, Tae-Moon (U-Terminal Research Team, Electronics and Telecommunications Research Institute)
  • 발행 : 2007.10.25
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초록

본 논문에서는 3D 그래픽스(graphics), H.264/H.263/MPEG-4 같은 동영상 코덱, JPEG 혹은 JPEG2000 같은 정지영상 코덱, MP3 같은 오디오 코덱 등 다양한 멀티미디어 관련 기술을 효율적으로 구현하기 위한 재구성형 병렬 프로세서 구조가 제안된다. 제안된 구조는 메모리와 프로세서를 직접 연결하여 메모리 접근 시간과 소비전력를 감소시키고, 3D 그래픽스 처리 과정중 기하 단계의 부동소수점 연산을 지원한다. 또한 분할 SIMD(partitioned SIMD) 방식을 사용하여 하드웨어 비용을 줄이고, 명령어(instruction)의 조건부 실행(conditional execution)을 지원하여 알고리듬 개발이 용이하다.

This paper proposes a reconfigurable parallel processor architecture which can efficiently implement various multimedia applications, such as 3D graphics, H.264/H.263/MPEG-4, JPEG/JPEG2000, and MP3. The proposed architecture directly connects memories and processors so that memory access time and power consumption are reduced. It supports floating-point operations needed in the geometry stage of 3D graphics. It adopts partitioned SIMD to reduce hardware costs. Conditional execution of instructions is used for easy development of parallel algorithms.

키워드

참고문헌

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