99dB의 DR를 갖는 단일-비트 4차 고성능 델타-시그마 모듈레이터 설계

Design of a 99dB DR single-bit 4th-order High Performance Delta-Sigma Modulator

  • 최영길 (한양대학교 전자컴퓨터공학) ;
  • 노형동 (한양대학교 전자컴퓨터공학) ;
  • 변산호 (한양대학교 전자컴퓨터공학) ;
  • 남현석 (한양대학교 전자컴퓨터공학) ;
  • 노정진 (한양대학교 전자컴퓨터공학)
  • Choi, Young-Kil (Dep. of Electronic, Electrical, Control and Instrumentation Engineering, Hanyang Univ.) ;
  • Roh, Hyung-Dong (Dep. of Electronic, Electrical, Control and Instrumentation Engineering, Hanyang Univ.) ;
  • Byun, San-Ho (Dep. of Electronic, Electrical, Control and Instrumentation Engineering, Hanyang Univ.) ;
  • Nam, Hyun-Seok (Dep. of Electronic, Electrical, Control and Instrumentation Engineering, Hanyang Univ.) ;
  • Roh, Jeong-Jin (Dep. of Electrical Engineering and Computer Science, Hanyang Univ.)
  • 발행 : 2007.02.25

초록

본 논문에서는 높은 dynamic range(DR)를 얻을 수 있는 단일-비트 4차 델타-시그마 모듈레이터를 제시하였으며, 이를 구현하였다. 본 모듈레이터에 사용된 루프 필터의 구조는 피드백 패스와 피드포워드 패스를 혼합하여 사용한 구조이며, 스위치-커패시터(switched-capacitor) 방식으로 구현되었다. 측정 결과로는 20kHz의 기저대역(base band)에서 3.2MHz의 클록을 사용하였을 때 최대 99dB의 DR을 얻었다. 본 모듈레이터는 $0.18{\mu}m$ standard CMOS 공정으로 만들어졌다.

In this paper, a fourth-order single-bit delta-sigma modulator is presented and implemented. The loop-filter is composed of both feedback and feedforward paths. Measurement results show that maximum 99dB dynamic range is achievable at a clock rate of 3.2MHz for 20kHz baseband. The proposed modulator has been fabricated in a $0.18{\mu}m$ standard CMOS process.

키워드

참고문헌

  1. A. L. Coban and P. E. Allen, 'A New Fourth-Order Single-Loop Delta-Sigma Modulator for Audio,' in Proc. IEEE ISCAS'96, vol. 1, May 1996, pp. 461-464
  2. A. Gharbiya and D. A. Johns, 'On The Implementation of Input-Feedforward Delta-Sigma Modulators,' IEEE Trans. Circuits Syst. Ⅱ, vol. 53, no. 6, pp. 453-457, June 2006 https://doi.org/10.1109/TCSII.2006.873829
  3. A. A. Hamoui and K. W. Martin, 'High-Order Multibit Modulators and Pseudo Data-Weighted-Averaging in Low-Oversampling ${\Delta}{\Sigma}$ ADCs for Broad-Band Applications,' IEEE Trans. Circuits Syst. Ⅰ, vol. 51, no. 1, pp. 72-85, Jan. 2004 https://doi.org/10.1109/TCSI.2003.821291
  4. P. Malcovati, S. Brigati, F. Francesconi, F. Maloberti, F. Cusinato and A. Baschirotto, 'Behavioral Modeling of Switched-Capacitor Sigma-Delta Modulators,' IEEE Trans. Circuits Syst. Ⅰ, vol. 50, no. 3, pp. 352-364, Mar. 2003 https://doi.org/10.1109/TCSI.2003.808892
  5. S. Rabii and B. A. Wooley, The Design of Low-Voltage, Low-Power Sigma-Delta Modulators. Norwell, MA: Kluwer, 1999
  6. B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2001
  7. R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters. New York: IEEE Press, 2005
  8. R. J. Baker, H. W. Li and D. E. Boyce, CMOS Circuit Design Layout and Simulation. New York: IEEE Press, 2005
  9. D. A. Johns and K. Martin, Analog Integrated Circuit Design. New York: Johns Wiley & Sons, 1997
  10. Y. Geerts, M. Steyaert and W. Sansen, Design of Multi-bit Delta-Sigma A/D Converters. Norwell, MA: Kluwer, 2002
  11. E. Fogleman, J. Welz, and I. Galton, 'An Audio ADC Delta-Sigma Modulator with 100-㏈Peak SINAD and 102-㏈DR Using a Second-Order Mismatch-Shaping DAC,' IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 339-348, Mar. 2001 https://doi.org/10.1109/4.910472
  12. C. B. Wang, S. Ishizuka, and B. Y. Liu, 'A 113-㏈ DSD Audio ADC Using a Density-Modulated Dithering Scheme,' IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 114-119, Jan. 2003 https://doi.org/10.1109/JSSC.2002.806260
  13. K. Nguyen, R. Adams, K. Sweetland and H. Chen, 'A 106-㏈ SNR Hybrid Oversampling Analog-to-Digital Converter for Digital Audio,'IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2408-2415, Dec. 2005 https://doi.org/10.1109/JSSC.2005.856284