상세배치를 위한 확장된 인터리빙 기법

An Extended Interleaving Technique for Detailed Placement

  • 오은경 (동아대학교 컴퓨터공학과) ;
  • 허성우 (동아대학교 전자컴퓨터공학부)
  • 발행 : 2006.08.01

초록

본 논문에서는 상세배치를 개선할 수 있는 확장된 인터리빙 기법을 제안한다. 기존의 행 -기반 인터리빙 기법은 한 행 내에서만 셀의 위치를 이동할 수 있는 제약이 있으며, 모든 셀이 여백 없이 인접해 있다는 가정 하에 적용 가능하였다. 본 논문에서 제안한 확장된 인터리빙 기법은 그런 제약을 극복하여 셀이 다른 행간에도 이동할 수 있도록 하였고, 또한 셀들 사이에 여백이 있는 경우에도 인터리빙 기법을 적용할 수 있도록 하였다. 반도체 설계 회사에서 사용 중인 CAD 툴에 의해 수렴된 상세배치를 제안된 인터리빙 기법을 이용하여 추가로 개선시킨 결과 HP(half perimeter)가 평균 9.5% 가 개선되었다.

In this paper we propose an extended interleaving technique to improve a detailed placement. The existing row-based interleaving technique allows cells to move only within a row and it can be applied when there is no space between cells. The proposed extended-interleaving technique releases such constraints so that cells can move along with a vertical line parallel to a y-axis and space between cells is properly handled. Converged detailed-placements by a mature CAD tool have been improved by the proposed interleaving technique by 9.5% on average in half-perimeter wire length.

키워드

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