References
- Semiconductor Industry Association, 'The International Technology Roadmap for Semiconductor 2003'
- Kingsuk, Maitra, and Veena, Misra, 'A Simulation Study to Evaluate the Feasibility of Midgap Workfunction Metal Gate in 25 nm Bulk CMOS', IEEE Electron Device Letters, Vol. 24, No. 11, pp. 707-709, November 2003 https://doi.org/10.1109/LED.2003.819267
- Indranil De, et al., 'Impact of gate workfunction on device performance at the 50 nm technology node', Solid-State Electronics, Vol. 44 (2000), pp. 1077- 1080 https://doi.org/10.1016/S0038-1101(99)00323-8
- Hon-sum Philip Wong, et al., 'Nanoscale CMOS', Proceedings of the IEEE, Vol. 87, No. 4, pp. 537-570, April 1999 https://doi.org/10.1109/5.752515
-
Tseng, H.-H, et al., 'ALD
$Hf0_2$ using heavy water$(D_2O)$ for improved MOSFET stability', IEDM Tech. Dig. pp. 83-86,2003 - Lee, J.C, et al., 'High-k dielectrics and MOSFET characteristics', IEDM Tech. Dig. 2003, pp. 95-98
- JaeHoon Lee, et al, 'Compatibility of dual metal gate electrodes with high-k dielectrics for CMOS', IEDM Tech. Dig. pp. 323-326,2003
- F.Ootsuka, et al., 'Ultra-Low Thermal Budget CMOS Process for 65 nm-node Low Operation-Power Applications', IEDM Tech. Dig. pp. 647-650,2002
- Kim. Y.W, et al., '50 nm gate length technology with 9-layer Cu interconnects for 90 nm node SoC applications', IEDM Tech. Dig. pp. 69-72, 2002
- Michael Y. Kwong, et al., 'Impact of Lateral SourceIDrain Abruptness on Device Performance', IEEE Transacts on Electron Devices, Vol. 49, No. 11, pp. 1882-1890, November 2002 https://doi.org/10.1109/TED.2002.806790
- Yuan Taur, 'MOSFET Channel Length: Extraction and Interpretation', IEEE Transacts on Electron Devices, Vol. 47, No. 1, pp. 160-170, January 2000 https://doi.org/10.1109/16.817582
Cited by
- Photo-Assisted Electrical Oscillation in Two-Terminal Device Based on Vanadium Dioxide Thin Film vol.30, pp.16, 2012, https://doi.org/10.1109/JLT.2012.2199466
- Bidirectional laser triggering of planar device based on vanadium dioxide thin film vol.22, pp.8, 2014, https://doi.org/10.1364/OE.22.009016
- Electrical Characteristics of Enhancement-Mode n-Channel Vertical GaN MOSFETs and the Effects of Sidewall Slope vol.10, pp.3, 2015, https://doi.org/10.5370/JEET.2015.10.3.1131