대한전기학회논문지:전기물성ㆍ응용부문C (The Transactions of the Korean Institute of Electrical Engineers C)

대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

고집적 메모리 커패시터의 Vertical Sidewall Patterning을 위한 BTO 박막의 CMP 특성

Chemical Mechanical Polishing Characteristics of BTO Thin Film for Vertical Sidewall Patterning of High-Density Memory Capacitor

  • 발행 : 2006.03.01
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초록

Most high-k materials are well known not to be etched easily, Some problems such as low etch rate poor sidewall angle, plasma damage, and process complexity were emerged from the high-density DRAM fabrication. Chemical mechanical polishing (CMP) by a damascene process was proposed to pattern this high-k material was polished with some commercial silica slurry as a function of pH variation. Sufficient removal rate with adequate selectivity to realize the pattern mask of tera-ethyl ortho-silicate (TEOS) film for the vertical sidewall angle were obtained. The changes of X-ray diffraction pattern and dielectric constant by CMP process were negligible. The planarization was also achieved for the subsequent multi-level processes. Our new CMP approach will provide a guideline for effective patterning of high-k material by CMP technique.

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참고문헌

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