Journal of Communications and Networks

  • 제7권1호
  • /
  • Pages.1-12
  • /
  • 2005
  • /
  • 1229-2370(pISSN)
  • /
  • 1976-5541(eISSN)
한국통신학회 (The Korean Institute of Commucations and Information Sciences)
권호 표지

High-Performance Synchronization for Circuit Emulation in an Ethernet MAN

  • Hadzic Ilija (Bell Labs, Lucent Technologies in Murray Hill) ;
  • Szurkowski Edward S. (Bell Labs, Lucent Technologies in Murray Hill)
  • 발행 : 2005.03.01
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

Ethernet is being deployed in metropolitan area networks (MANs) as a lower-cost alternative to SONET-based infrastructures. MANs are usually required to support common communication services, such as voice and frame relay, based on legacy synchronous TDM technology in addition to asynchronous packet data transport. This paper addresses the clock synchronization problem that arises when transporting synchronous services over an asynchronous packet infrastructure, such as Ethernet. A novel algorithm for clock synchronization is presented combining time-stamp methods used in the network time protocol (NTP) with signal processing techniques applied to measured packet interarrival times. The algorithm achieves the frequency accuracy, stability, low drift, holdover performance, and rapid convergence required for viable emulation of TDM circuit services over Ethernet.

키워드

참고문헌

  1. J. Babcock, 'Sonet: A practical perspective,' Business Commun. Review, vol. 20, no. 9, pp. 59-63, Sept. 1990
  2. A. Chapman and H. T. Kung, 'Enhancing transport networks with Internet protocols,' IEEE Commun. Mag., vol. 36, no. 5, pp. 100-101, May 1998
  3. R. M. Metcalfe and D. R. Boggs, 'Ethernet: Distributed packet switching for local computer networks,' Commun. of the ACM, vol. 19, no. 5, pp. 395-404, July 1976 https://doi.org/10.1145/360248.360253
  4. International Telecommunication Union (ITU), Telecommunication Standardization Sector, 'The control of jitter and wonder within digital networks which are based on the 1544 kbits/s hierarchy,' ITU-T Recommendation G.824, Mar. 2000
  5. American National Standard Institute, 'Synchronization interface standard,' ANSI T1.101-1994, Feb. 1994
  6. S. Bregni, 'A historical perspective on telecommunications network synchronization,' IEEE Cornman. Mag., vol. 36, no. 6, pp. 158-166, June 1998 https://doi.org/10.1109/35.685385
  7. International Telecommunications Union, 'B-ISDN ATM adaptation layer specification: Type 1 AAL,' ITU- T 1.363, Aug. 1996
  8. R. C. Lau and P. E. Fleischer, 'Synchronous techniques for timing recovery in BISDN,' IEEE Trans. Commun., vol. 43, no. 234, pp. 1810-1818, Feb./Mar./Apr. 1995 https://doi.org/10.1109/26.380232
  9. C.-S. Li and Y. Ofek, 'Distributed source-destination synchronization using inband clock distribution,' IEEE J. Select. Areas Commun., vol. 14, no. 1, pp. 153-161, Jan. 1996 https://doi.org/10.1109/49.481701
  10. R. Nora, M. Hamdi, and J. P. Hubaux, 'Circuit emulation over IP networks,' in Proc. IFIP TC6 WG6.1 & WG6.4 / IEEE ComSoc TC on on Gigabit Networking 6-th International Workshop on Protocols for High Speed Networks VI, Aug. 1999, pp. 187-201
  11. W. C. Lindsey and C. M. Chie, 'A survey of digital phase-locked loops,' Proc. IEEE, vol. 69, no. 4, pp. 410-431, Apr. 1981 https://doi.org/10.1109/PROC.1981.11986
  12. B. G. Goldberg, 'Programmable fractional-N frequency synthesizer,' U.S. Patent 5,223,132, Jan. 1992
  13. C. L. Phillips and H. T. Nagle, Digital Control Systems, Analysis and Design, 2nd ed., Prentice Hall, 1990
  14. H. M. Ahmed and M. G. Hluchyj, 'ATM circuit emulation - a comparison of recent techniques,' in Proc. IEEE GLOBECOM'91, 1991, pp. 370-374 https://doi.org/10.1109/GLOCOM.1991.188413
  15. D. L. Mills, 'Improved algorithms for synchronizing computer network clocks,' IEEE/ACM Trans. Networking, vol. 3, no. 3, pp. 245-254, June 1995 https://doi.org/10.1109/90.392384
  16. D. L. Mills, 'Adaptive hybrid clock discipline algorithm for the network time protocol,' IEEE/ACMTrans. Networking, vol. 6, no. 5, pp. 505-514, Oct. 1998 https://doi.org/10.1109/90.731182
  17. D. L. Mills, 'On the accuracy and stability of clocks synchronized by the network time protocol in the Internet system,' ACM Comput. Commun. Review, vol. 20, no. 1, pp. 65-75, Jan. 1990
  18. D. L. Mills, 'Modeling and analysis of computer network clocks,' Electrical Engineering Report 92-5-2, University of Delaware, May 1992
  19. A. V. Oppenheim and R. W. Shaffer, Discrete-Time Signal Processing, Prentice Hall, 1989
  20. L. Breslau et aI., 'Advances in network simulation,' Computer, vol. 33, no. 5, pp. 59-67, May 2000 https://doi.org/10.1109/2.841785
  21. S. Floyd and V. Jacobson, 'Link-sharing and resource management models for packet networks,' IEEE/ACM Trans. Networking, vol. 3, no. 4, pp. 365-386, Aug. 1995 https://doi.org/10.1109/90.413212
  22. Motorola, 'PowerQUICC II integrated communications processor family,' Motorola Fact Sheet, Rev. 3, 2001
  23. Pseudo Wire Emulation Edge to Edge (pwe3), http://www.ietf.org/html. charters/pwe3 -charter. html
  24. Metro Ethernet Forum, http://www.metroethernetforum.org