The Journal of Korean Institute of Electromagnetic Engineering and Science (한국전자파학회논문지)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
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A MB-OFDM UWB Receive Design and Evaluation Using 4. Parallel Synchronization Architecture

4 병렬 동기 구조를 이용한 MB-OFDM UWB 수신기 설계 및 평가

  • Shin Cheol-Ho (Wireless Home Network Research Team, ETRI) ;
  • Choi Sangsung (Wireless Home Network Research Team, ETRI) ;
  • Lee Hanho (School of Information and Communication Engineering, Inha University) ;
  • Pack Jeong-Ki (Department of Radio Science & Engineering, Chungnam National University)
  • 신철호 (한국전자통신연구원 무선홈네트워크연구팀) ;
  • 최상성 (한국전자통신연구원 무선홈네트워크연구팀) ;
  • 이한호 (인하대학교 정보통신학부) ;
  • 백정기 (충남대학교 전파공학과)
  • Published : 2005.11.01
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Abstract

The purpose of this paper is to design the architecture for synchronization of MB-OFDM UWB system that is being processed the standardization for Alt-PHY of WPAN(Wireless Personal Area Network) at IEEE802.15.3a and to analyze the implementation loss due to 4 parallel synchronization architecture for design or link margin. First an overview of the MB-OFDM UWB system based on IEEE802.15.3a Alt-PHY standard is described. The effects of non-ideal transmission conditions of the MB-OFDM UWB system including carrier frequency offset and sampling clock offset are analyzed to design a full digital architecture for synchronization. The synchronization architecture using 4-parallel structure is then proposed to consider the VLSI implementation including algorithms for carrier frequency offset and sampling clock offset to minimize the effects of synchronization errors. The overall performance degradation due to the proposed synchronization architecture is simulated to be with maximum 3.08 dB of the ideal receiver in maximum carrier frequency offset and sampling clock offset tolerance fir MB-OFDM UWB system.

본 논문은 IEEE802.15.3a Alt-PHY로 표준화중인 MB-OFDM WB(Multi-Band Orthogonal Frequency Division Multiplexing Ultra Wide Band) 시스템 수신기 설계 방안을 제시하고 링크 마진(link margin) 설계를 위해 4 병렬 구조에 의한 구현 손실을 정량적으로 분석하는 것이다. 먼저 MB-OFDM UWB 시스템의 전송 방식을 설명하고, 동기 구조를 완전한 디지털 방식으로 설계하기 위해 반송 주파수 옵셋(carrier frequency offset)과 샘플링 클락옵셋(sampling clock offset)이 MB-OFDM UWB 시스템에 미치는 영향을 분석하였다. 그리고 이러한 반송 주파수 옵셋과 샘플링 클락 옵셋을 추정하고 보상하기 위한 알고리즘과 VLSI 구현을 위하여 MB-OFDM UWB 시스템의 패킷 전송 구조를 이용한 4 병렬 동기 구조를 제시하였다. 본 논문에서 제시한 시스템 동기를 위한 수신 구조와 단순화된 4 병렬 구조에 의한 구현 손실 값은 UWB-OFDM 시스템 규격에서 제시한 최대 허용 가능한 반송 주파수 옵셋 및 샘플링 클락 옵셋에서 최대 3.08 dB로 시뮬레이션을 통해 분석되었다.

Keywords

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