International Journal of Fuzzy Logic and Intelligent Systems

Korean Institute of Intelligent Systems (한국지능시스템학회)
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A Novel Low Power Design of ALU Using Ad Hoc Techniques

  • Agarwa, Ankur (Dept. of Computer Science & Engineering, Florida Atlantic University) ;
  • Pandya, A.S. (Dept. of Computer Science & Engineering, Florida Atlantic University) ;
  • Lho, Young-Uhg (Dept. of Computer Education, Silla University)
  • Published : 2005.06.01
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Abstract

This paper presents the comparison and performance analysis for CPL and CMOS based designs. We have developed the Verilog-HDL codes for the proposed designs and simulated them using ModelSim for verifying the logical correctness and the timing properties of the proposed designs. The proposed designs are then analyzed at the layout level using LASI. The layouts of the proposed designs are simulated in Winspice for timing and power characteristics. The result shows that the new circuits presented consistently consume less power than the conventional design of the same circuits. It can also be seen that these circuits have the lesser propagation delay and thus higher speed than the conventional designs.

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References

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