참고문헌
- R. Harrison, P. Hasler and B. A. Minch, 'FloatingGate CMOS Analog Memory Cell Array,' in Proc. Int. Symp. Circuits and Systems. Monterey, CA. 1998 https://doi.org/10.1109/ISCAS.1998.706877
- R. Harrison, A. Bragg and P. Hasler, 'A CMOS Programmable Analog Memory-Cell Array Using Floating-Gate Circuits,' IEEE Trans. on circuits and systems, Vol. 48, No. 1, pp. 4-11, Jan. 2001 https://doi.org/10.1109/82.913181
-
Y. Y. Chai, 'A
$2{times}2$ Analog Memory Implemented with a Special Layout Injector,' IEEE Journal of Solid-State Circuits, Vol. 32, pp.856-859. June 1996 https://doi.org/10.1109/4.509874 - S. B. Lee and K. Y. Seo, 'Status and Trends in EEPROM Technologies,' The Journal of the korean Institude of Electrical and Electronic Material Engineers, Vol. 7, No.2, pp. 165-175, 1994
- W. D. Brown and J E. Brewer. 'Nonvolatile Semiconductor Memory Technology: A Comprehensive Guide to Understanding and Using NVSM Devices', IEEE Press, pp, 6-9, 1998
- K. Ohsaki, N. Asamoto and S. Takagaki, 'A Single Poly EEPROM Cell Structure for Use in Standard CMOS Processes,' IEEE J. Solid State circuit, Vol. 29, No.3, pp. 311-316. Mar. 1994 https://doi.org/10.1109/4.278354
- R. J McParland and R. Singh, '1.25V, Low Cost, Embedded Flash Memory for Low Density Applications,' 2000 symposium on VLSI circuits Digest of Technical paper. June 2000
-
M. Lenzlinger and E. H. Snow, 'Fowler-Nordheim Tunneling into Thermally Grown
$SiO_2$ ,' J. Applied Physics, Vol. 40, No.6, pp. 278-283.5, Jan. 1969 https://doi.org/10.1063/1.1657043