Growth and Annealing Effect of Cu thin Films Using Electroplating Technique

전해도금법을 이용한 구리 박막의 성장 및 열처리 효과

  • 박병남 (경북대학교 전자전기공학부) ;
  • 강현재 (경북대학교 전자전기공학부) ;
  • 최시영 (경북대학교 전자전기공학부)
  • Published : 2003.10.01

Abstract

Copper thin films were deposited on a Cu/Ta/Si substrate using the electroplating technique. Deposition rate was about 200 nm/min in proportion to current density and in inverse proportion to flow rate. Resistivity of copper thin film was approximately 2.1 ${\mu}$Ωcm and Int$\sub$(111)//Int$\sub$(200)/ ratio of copper film was 5.4 and no significant impurities were detected. After the deposition, electroplating copper films were annealed at various temperatures in a background pressure of 10$\^$-3/ torr. The resistivity of copper thin films were improved by ∼17 % and texture was improved by ∼40 % after annealing at 170$^{\circ}C$. The stress in films was not reduced much after annealing below 170$^{\circ}C$.

본 연구는 Cu/Ta/Si 기판 위에 전해 도금법으로 성장시킨 구리 박막을 성장 시켰다. 성장 속도는 음극 전류 밀도에 비례하고, 용액의 유량에 반비례하였다. 성장된 구리 박막의 저항률은 약 2.1 μΩ㎝ 이었고, Int/sub (111)//Int/sub (200)/, 비는 5.4였으며, 박막내에 불순물은 발견되지 않았다. 성막후에 10/sup -3/ torr 진공 중에서 온도를 변화해 가면서 열처리를 수행하였다. 열처리후에 저항률은 17 %, 결정성은 40 %의 향상을 보였으며 170℃ 까지는 박막의 스트레스는 변화가 없었다.

Keywords

References

  1. K. Suzuki, T. Fujikawa and N. Kawakami, 'Application of high pressure prcess into Cu/Low-k technologies', Proc, of Interconnect Technology Conference on IEEE, p105, 2000 https://doi.org/10.1109/IITC.2000.854295
  2. R. J. Contolini, L. Tarte, R. T. Graff and L. B. Evans, 'Copper electroplanting process for sub-half-micron ULSI structures,' Proc. of VMIC '95, Santa Clara, CA, p322, 1995
  3. C. E. Murray and K. P. Rodbell, 'Texture inheritance in Al(Cu) interconnect materials', Journal of Applied Physics, vol. 89, no. 4, p2337, 2001 https://doi.org/10.1063/1.1337938
  4. C. R. Simpson, D. M. Pena and J. V. Cole, 'Considerations for integration of electroplated copper onto semiconductor substrates', Proc. of Electrochemical Society, vol. 98-6, p59, 1998
  5. T. G. Koetter, H. Wendrock, H. Schuehrer, C. Wenzel and K. wetzig, 'Relationship between microstructure and electromigration damage in unpassivated PVD copper damascene inter-connects', Micorelectronics Reliability, vol. 40, p1295, 2000 https://doi.org/10.1016/S0026-2714(00)00140-2
  6. K. K. Chol and S. W. Rhee, 'Chemical vapor deposition of copper film from hexafluoroacetyl-acetonateCu(I)vinycyclohexane', Thin Solid Films, vol. 397, p70, 2001 https://doi.org/10.1016/S0040-6090(01)01406-7
  7. S. D. Yosi and S. Lopatin, 'Integrated electroless metallization for ULSI', Electro-chimica Acta, vol. 44, p3639, 1999 https://doi.org/10.1016/S0013-4686(99)00067-5
  8. B. N. Park, S. C. Bae, S. H. Son, J. H. Lee and S. Y. Choi, 'Film properties of copper grown by the electroplating process', J. Kor. Phys. Soc., vol. 38, no.3, p232, 2001
  9. S. I. Wakabayashi et al., 'A build-up substrate utilizing a new via fill technology by electro-plating', Proc. of 4th Intermational Conference of Adhesive Joining and Coating Technology in Electronics Manufacturing, p 280, 2000 https://doi.org/10.1109/ADHES.2000.860620
  10. R. D. Mikkola and L. Chen, 'Investigation of the roles of the additive components for second generation copper electroplating chemistries used for advanced interconnect metalization', Proc. of Interconnect Technology conference on IEEE, p 117, 2000 https://doi.org/10.1109/IITC.2000.854299
  11. K. C. Park et al., 'Process integration of CD Cu as a seed layer for Cu electroplating and a plug-fill application', Proc. of Interconnect Technology conference on IEEE, p43, 2000 https://doi.org/10.1109/IITC.2000.854276
  12. K. Weiss et al., 'Development of different copper seed layers with respect to the copper electroplating process', Micorelectronic Engineering, vol. 50, p433, 2000 https://doi.org/10.1016/S0167-9317(99)00312-3